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| 型号： | LTC3778EF#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 19/24页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM CM 20TSSOP |
| 标准包装： | 74 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 电源电压： | 4 V ~ 36 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 20-TSSOP（0.173"，4.40mm 宽） |
| 包装： | 管件 |
| 产品目录页面： | 1336 (CN2011-ZH PDF) |
LTC3778
APPLICATIO S I FOR ATIO
? I TH = ?
? 12 V ?
? R SENSE OUT
I TH ( NOM ) = ?
? R SENSE ? I OUT L ? + 0 . 75 V
? 12 V ? ? 1 ?
(
)
= ?
? 0 . 002 ? ? 0 A – 5 . 8 A ? + 0 . 75 V
? I TH m VP ?
? 0 . 6 V ?
? ? V OUT
? I
? V RNG ?
= ( 24 ) ( 0 . 002 ? )( 20 A ) = 0 . 96 V
The corresponding change in the output voltage is deter-
mined by the gain of the error amplifier and feedback
divider. The LTC3778 error amplifier has a transcon-
ductance g m that is constant over both temperature and a
wide ± 40mV input range. Thus, by connecting a load
resistance R VP to the I TH pin, the error amplifier gain can
be precisely set for accurate voltage positioning.
= g R
? V OUT ?
these resistors must equal R VP and their ratio determines
nominal value of the I TH pin voltage when the error
amplifier input is zero. To set the beginning of the load line
at the regulation point, the I TH pin voltage must be set to
correspond to zero output current. The relation between
voltage and the output current is:
– ? I
? V RNG ? ? 2 ?
? 12 V ? ? 1 ?
? 0 . 5 V ? ? 2 ?
= 0 . 61 V
Solving for the required values of the resistors:
R VP =
=
R VP 1 =
R VP =
R VP 2 =
R VP =
15 . 7 k = 129 k
Solving for this resistance value:
V OUT ? I TH
( 0 . 6 V ) g m ? V OUT
( 1 . 25 V )( 0 . 96 V )
( 0 . 6 V )( 1 . 7 mS )( 75 mV )
= 15 . 7 k
5 V 5 V
5 V – I TH ( NOM ) 5 V – 0 . 61 V
= 18 k
5 V 5 V
I TH ( NOM ) 0 . 61 V
15 . 7 k
The gain setting resistance R VP is implemented with two
resistors, R VP1 connected from I TH to ground and R VP2
connected from I TH to INTV CC . The parallel combination of
C SS
0.1 μ F
The active voltage positioned circuit is shown in Figure 8.
Refer to Linear Technology Design Solutions 10 for addi-
tional information about output voltage positioning.
R RNG1 R RNG2
4.99k 45.3k
R PG
100k
1
2
3
RUN/SS BOOST
LTC3778
V ON TG
PGOOD SW
20
19
18
D B
CMDSH-3
C B
0.33 μ F
M1
IRF7811
× 2
L1
0.68 μ H
C IN
22 μ F
50V
× 3
V IN
7V TO 24V
V OUT
1.25V
20A
C C1
2.2nF
R C
20k
R VP2
129k
R VP1
18k
4
5
C C1
100pF 6
V RNG
I TH
FCB
SENSE +
SENSE –
PGND
17
16
15
M2
IRF7811
× 3
R SENSE
0.002 ?
D1
UPS840
C OUT
270 μ F
2V
× 3
C ION 0.01 μ F
7
8
SGND
I ON
BG
DRV CC
14
13
C VCC
4.7 μ F
11.7k
R ON
330k
C FB
100pF
9
12.7k
10
5V
V FB
EXTV CC
INTV CC
V IN
12
11
R F
1 ?
C F
0.1 μ F
C IN : UNITED CHEMICON
THCR70EIH226ZT
C OUT : PANASONIC EEFUE0D271
L1: SUMIDA CEP125-4712-T007
3778 F08
Figure 8. CPU Core Voltage Regulator with Active Voltage Positioning 1.25V/20A at 300kHz
3778f
19
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