参数资料
型号: LTC3785EUF-1#PBF
厂商: Linear Technology
文件页数: 14/20页
文件大小: 0K
描述: IC REG CTRLR BST PWM VM 24-QFN
标准包装: 91
PWM 型: 电压模式
输出数: 2
频率 - 最大: 1MHz
占空比: 99%
电源电压: 2.7 V ~ 10 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 24-WFQFN 裸露焊盘
包装: 管件
LTC3785-1
APPLICATIONS INFORMATION
CLOSING THE FEEDBACK LOOP
The LTC3785-1 incorporates voltage mode control. The
control to output gain is given by:
G Buck = 1.6 ? V IN , Buck Mode
A simple type I compensation network (Figure 5) can be
incorporated to stabilize the loop but at a cost of reduced
bandwidth and slower transient response. To ensure proper
phase margin, the loop must cross over almost a decade
before the L-C double pole.
G BOOST =
1.6 ? V OUT 2
V IN
, Boost Mode
The unity gain frequency of the error ampli?er with the
type 1 compensation is given by:
The output ?lter exhibits a double-pole response and is
given by:
f UG =
1
2 ? π ? R1? C P1
f FILTER _ POLE =
1
2 ? π ? L ? C OUT
Most applications demand an improved transient response
to allow a smaller output ?lter capacitor. To achieve a higher
bandwidth, type III compensation is required as shown
f FILTER _ ZERO =
f POLE1 ≈
2 ? π ? 32e3 ? C P1 ? R1
f ZERO1 =
f ZERO2 =
where C OUT is the output ?lter capacitor.
The output ?lter zero is given by:
1
2 ? π ? R ESR ? C OUT
where R ESR is the capacitor equivalent series resistance.
A troublesome feature in boost mode is the right half plane
zero (RHP), and is given by:
in Figure 6. Two zeros are required to compensate for the
double pole response.
1
(a very low frequency)
1
2 ? π ? R Z ? C P1
1
2 ? π ? R1? C Z1
f RHPZ =
V IN 2
2 ? π ?I OUT ? L ? V OUT
f POLE2 ≈
1
2 ? π ? R Z ? C P2
The loop gain is typically rolled off before the RHP zero
frequency.
V OUT
+
ERROR
AMP
1.225V
FB
V OUT
R1
+
ERROR
AMP
1.225V
FB
R1
C Z1
V C
C P1
R2
V C
R Z
C P1
R2
37851 F05
C P2
37851 F06
Figure 5. Error Ampli?er with Type I Compensation
Figure 6. Error Ampli?er with Type III Compensation
37851fa
14
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