参数资料
型号: LTC3811EUHF#TRPBF
厂商: Linear Technology
文件页数: 12/48页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 38-QFN
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 850kHz
占空比: 90%
电源电压: 4.5 V ~ 30 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 38-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3811
PIN FUNCTIONS
FB1, FB2: Error Ampli?er Feedback Input Pins. The error
ampli?ers in the LTC3811 are high bandwidth, low offset
true operational ampli?ers. If differential remote sensing
is not used, the FB pin should be connected to a resistor
divider from the output of the power supply to SGND with
the resistors placed close to the IC. In normal regulation the
voltage at the FB pin is 0.6V. If remote sensing is used the
FB pin should be connected to a resistor divider from the
output of the differential ampli?er to SGND. For multiphase
operation, connecting the FB pin of a slave error ampli?er
to INTV CC will disable the output of that ampli?er, allowing
ampli?er outputs to be connected in parallel.
INTV CC : Supply Pin for All of the Internal Low Voltage
Analog and Digital Control Circuitry, Electrically Isolated
from the DRV CC Pin. The INTV CC supply is normally derived
by connecting a low value resistor (1 Ω ) from the output
of the LDO (DRV CC ) to INTV CC and connecting a 0.1μF low
ESR (X5R or better) ceramic bypass capacitor connected
from INTV CC to SGND. This RC decoupling con?guration
prevents gate driver switching noise from coupling into the
analog control circuitry. The INTV CC decoupling capacitor
should be connected as close as possible to the IC pins.
MODE/SYNC: Mode Control and PLL Synchronization
Input. This pin programs the operating mode and serves
as the sync input to the internal phase-lock loop (PLL).
Connecting this pin to INTV CC forces continuous operation
(regardless of the load current) and connecting it to SGND
allows discontinuous mode operation at light load. Applying
an external clock between 175kHz and 900kHz will cause
the operating frequency to synchronize to the clock.
PGND: Power Supply Return Path for the Bottom Side
Gate Drivers, Connected to the Sources of the Lower
Power MOSFETs. PGND should also be connected to the
negative terminal of the DRV CC decoupling capacitor as
close as possible to the IC. PGND is electrically isolated
from the SGND pin. The Exposed Pad on the bottom of
the QFN package is PGND.
PGOOD1, PGOOD2: An Open-Drain NMOS Power Good
Output. This output turns on, pulling down the PGOOD
pin, when the FB voltage falls out of a ±10% regulation
window. The PGOOD monitor circuit contains a 130μs
nuisance ?lter to prevent short duration UV and OV tran-
sients from triggering the PGOOD output on, and a 30μs
?lter for the recovery from a fault condition.
PHASEMODE (QFN Only): The PHASEMODE pin voltage
programs the phase relationship between the channel 1 and
channel 2 rising TG signals, as well as the phase relation-
ship between the channel 1 TG signal and CLKOUT.
PLL/LPF: Frequency Set and PLL Lowpass Filter Input.
When not synchronized, this pin can be used to program
the operating frequency. Connecting this pin to SGND
forces 250kHz operation and connecting it to INTV CC
forces 750kHz operation. Connecting the PLL/LPF pin to
a voltage between 0.4V and 2V forces 500kHz operation.
When synchronizing to an external clock, this pin serves
as the lowpass ?lter input for the PLL. A series resistor and
capacitor connected from PLL/PLF to SGND compensate
the PLL feedback loop.
RNG1, RNG2: The voltage at this pin programs the sense
voltage range for peak current mode control. Connecting
this pin to SGND programs a peak sense voltage of 24mV
and connecting it to INTV CC programs a peak sense volt-
age of 50mV. Alternatively, the sense voltage range can be
linearly programmed by programming the RNG pin from
0.6V to 2V with a divider from INTV CC to SGND.
RUN1, RUN2: On/Off Input Pin for Each Controller.
SENSE1 + , SENSE2 + : Positive Inputs to the Current Com-
parators and Voltage Positioning g m Ampli?er. The COMP
pin voltage programs the current comparator offset in
order to set the peak current trip threshold. The LTC3811
is capable of sensing current using a discrete resistor in
series with the inductor, or by indirectly sensing the volt-
age drop across the DCR of the inductor. See Applications
Information for more details.
3811f
12
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LTC3812EFE5#PBF 制造商:Linear Technology 功能描述:
LTC3812EFE-5#PBF 功能描述:IC REG CTRLR BUCK PWM CM 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 特色产品:LM3753/54 Scalable 2-Phase Synchronous Buck Controllers 标准包装:1 系列:PowerWise® PWM 型:电压模式 输出数:1 频率 - 最大:1MHz 占空比:81% 电源电压:4.5 V ~ 18 V 降压:是 升压:无 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-5°C ~ 125°C 封装/外壳:32-WFQFN 裸露焊盘 包装:Digi-Reel® 产品目录页面:1303 (CN2011-ZH PDF) 其它名称:LM3754SQDKR
LTC3812EFE-5#TRPBF 功能描述:IC REG CTRLR BUCK PWM CM 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR)
LTC3812IFE-5#PBF 功能描述:IC REG CTRLR BUCK PWM CM 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR)
LTC3812IFE-5#TRPBF 功能描述:IC REG CTRLR BUCK PWM CM 16TSSOP RoHS:是 类别:集成电路 (IC) >> PMIC - 稳压器 - DC DC 切换控制器 系列:- 标准包装:2,500 系列:- PWM 型:电流模式 输出数:1 频率 - 最大:500kHz 占空比:96% 电源电压:4 V ~ 36 V 降压:无 升压:是 回扫:无 反相:无 倍增器:无 除法器:无 Cuk:无 隔离:无 工作温度:-40°C ~ 125°C 封装/外壳:24-WQFN 裸露焊盘 包装:带卷 (TR)