参数资料
型号: LTC3811EUHF#TRPBF
厂商: Linear Technology
文件页数: 18/48页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 38-QFN
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 850kHz
占空比: 90%
电源电压: 4.5 V ~ 30 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 38-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3811
OPERATION
(Refer to the Functional Diagram)
The SS/TRACK pin has an internal open-drain NMOS pull-
down transistor that turns on when the corresponding RUN
pin is pulled low to disable that controller, when the voltage
on the DRV CC pin is below 3.7V (the rising undervoltage
operating mode will always be forced continuous. Forcing
continuous mode operation results in constant frequency
operation and a more predictable noise spectrum from
the converter.
lockout threshold), or during an overtemperature condition.
During an undervoltage lockout, UVLO, or overtempera-
ture, OT, condition, both controllers are disabled and the
external MOSFETs are held off.
In multiphase applications, one master error ampli?er is
used to control all of the phase current comparators. The
Table 1
MODE/SYNC
SGND
INTV CC
External Clock
OPERATING MODE
Pulse-Skip
Forced Continuous
Forced Continuous
DESCRIPTION
DCM Operation at Light Load
CCM from No Load to Full Load
Operating Frequency Synchronized
Using Internal PLL (CCM)
FB pins for the unused error ampli?ers are connected to
INTV CC in order to three-state these ampli?er outputs. As a
result, the SS/TRACK pins for the unused error ampli?ers
should be left open.
Programming the Operating Mode
The MODE/SYNC pin serves to either program the oper-
ating mode or to synchronize the operating frequency to
an external clock using the internal PLL. Connecting the
MODE/SYNC pin to ground programs pulse-skip mode
operation and connecting the pin to INTV CC programs
forced continuous operation, as shown in Table 1. In pulse-
skip mode the inductor current is not allowed to reverse,
resulting in discontinuous mode, DCM, operation at light
Frequency Selection and the Phase-Lock Loop
The selection of the switching frequency is a tradeoff be-
tween ef?ciency, transient response and component size.
Low frequency operation increases ef?ciency by reducing
MOSEFT switching losses, but requires a larger inductor
and output capacitor to maintain low output ripple.
The switching frequency of the LTC3811’s controllers can
be selected using the PLL/LPF pin. If the MODE/SYNC pin is
not being driven by an external clock, the PLL/LPF pin can be
tied to SGND, left open or tied to INTV CC to select 250kHz,
500kHz or 750kHz, respectively, as shown in Table 2.
Table 2
load. Pulse-skip mode is ideal for applications where light
load ef?ciency is a higher priority than transient response.
In forced continuous mode, the synchronous switch turns
on after the primary switch turns off and remains on for the
duration of the clock cycle, regardless of the load current.
Forced continuous mode is ideal for applications need-
PLL/LPF
SGND
Floating
INTV CC
RC Filter to SGND
MODE/SYNC
0V or INTV CC (DC)
0V or INTV CC (DC)
0V or INTV CC (DC)
Connected to External
Clock
FREQUENCY
250kHz
500kHz
750kHz
Phase Locked to
External Clock
ing optimized transient response, or for systems where
constant frequency operation is important.
Certain applications can result in the startup of the con-
verter into a non-zero load voltage, where residual charge
is stored on the output capacitor at the onset of converter
switching. In order to prevent a reversal of current in the
inductor under these conditions, pulse-skip operation
is asserted at startup until the FB pin reaches the lower
PGOOD threshold of 0.54V. Once the FB pin voltage exceeds
0.54V, the operating mode is determined by the voltage
on the MODE/SYNC pin.
When the operating frequency of the converter is synchro-
A phase-lock loop is available on the LTC3811 to syn-
chronize the internal oscillator to an external clock source
connected to the MODE/SYNC pin. In this case, a series
RC network connected from the PLL/LPF pin to SGND
serves as the PLL’s loop ?lter. The PLL/LPF pin is both the
output of the phase detector and the input to the voltage
controlled oscillator, VCO. The LTC3811 phase detector
adjusts the voltage on the PLL/LPF pin to align the ris-
ing edge of TG1 to the leading edge of the external clock
signal. The turn-on of the second channel TG2 will depend
upon the voltage on the PHASEMODE pin as shown in the
Electrical Characteristics.
nized to an external clock using the MODE/SYNC pin, the
3811f
18
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