参数资料
| 型号： | LTC3813EG#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 8/32页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BST PWM CM 28-SSOP |
| 标准包装： | 47 |
| PWM 型： | 电流模式 |
| 输出数： | 1 |
| 频率 - 最大： | 1MHz |
| 电源电压： | 7 V ~ 75 V |
| 降压： | 无 |
| 升压： | 是 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 28-SSOP（0.209"，5.30mm 宽） |
| 包装： | 管件 |
| 产品目录页面： | 1336 (CN2011-ZH PDF) |
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LTC3813
PIN FUNCTIONS
I OFF (Pin 1): Off-Time Current Input. Tie a resistor from
V OUT to this pin to set the one-shot timer current and
thereby set the switching frequency.
V OFF (Pin 4): Off-Time Voltage Input. Voltage trip point
for the on-time comparator. Tying this pin to an external
resistive divider from the input makes the off-time pro-
portional to V IN . The comparator defaults to 0.7V when
the pin is grounded and defaults to 2.4V when the pin is
connected to INTV CC .
V RNG (Pin 5): Sense Voltage Limit Set. The voltage at this
pin sets the nominal sense voltage at maximum output
current and can be set from 0.5V to 2V by a resistive
divider from INTV CC . The nominal sense voltage defaults
to 95mV when this pin is tied to ground, and 215mV when
tied to INTV CC .
PGOOD (Pin 6): Power Good Output. Open-drain logic
output that is pulled to ground when the output voltage
is not between ±10% of the regulation point. The output
voltage must be out of regulation for at least 125μs before
the power good output is pulled to ground.
SYNC (Pin 7): Sync Pin. This pin provides an external
clock input to the phase detector. The phase-locked loop
will force the rising top gate signal to be synchronized
with the rising edge of the clock signal.
I TH (Pin 8): Error Ampli?er Compensation Point and Cur-
rent Control Threshold. The current comparator threshold
increases with control voltage. The voltage ranges from
0V to 2.6V with 1.2V corresponding to zero sense voltage
(zero current).
V FB (Pin 9): Feedback Input. Connect V FB through a resistor
divider network to V OUT to set the output voltage.
PLL/LPF (Pin 10): The phase-locked loop’s lowpass ?lter
is tied to this pin. The voltage at this pin defaults to 1.2V
when the IC is not synchronized with an external clock at
SS (Pin 11): Soft-Start Input. A capacitor to ground at
this pin sets the ramp rate of the maximum current sense
threshold.
SGND (Pin 12): Signal Ground. All small signal components
should connect to this ground and eventually connect to
PGND at one point.
SHDN (Pin 13): Shutdown Pin. Pulling this pin below 1.5V
will shut down the LTC3813, turn off both of the external
MOSFET switches and reduce the quiescent supply cur-
rent to 240μA.
UVIN (Pin 14): UVLO Input. This pin is input to the internal
UVLO and is compared to an internal 0.8V reference. An
external resistor divider is connected to this pin and the
input supply to program the undervoltage lockout voltage.
When UVIN is less than 0.8V, the LTC3813 is shut down.
NDRV (Pin 15): Drive Output for External Pass Device of
the Linear Regulator for INTV CC . Connect to the gate of an
external NMOS pass device and a pull-up resistor to the
input voltage V IN or the output voltage V OUT .
EXTV CC (Pin 16): External Driver Supply Voltage. When
this voltage exceeds 6.7V, an internal switch connects
this pin to INTV CC through an LDO and turns off the exter-
nal MOSFET connected to NDRV, so that controller and
gate drive are drawn from EXTV CC .
INTV CC (Pin 17): Main Supply Pin. All internal circuits
except the output drivers are powered from this pin.
INTV CC should be bypassed to ground (Pin 10) with at
least a 0.1μF capacitor in close proximity to the
LTC3813.
DRV CC (Pin 18): Driver Supply Pin. DRV CC supplies power
to the BG output driver. This pin is normally connected to
INTV CC . DRV CC should be bypassed to BGRTN (Pin 20)
with a low ESR (X5R or better) 1μF capacitor in close
proximity to the LTC3813.
the SYNC pin.
3813fb
8
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