参数资料
型号: LTC3822EMSE#PBF
厂商: Linear Technology
文件页数: 9/20页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 10-MSOP
标准包装: 50
PWM 型: 电流模式
输出数: 1
频率 - 最大: 850kHz
占空比: 99%
电源电压: 2.75 V ~ 4.5 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 10-TFSOP,10-MSOP(0.118",3.00mm 宽)裸露焊盘
包装: 管件
产品目录页面: 1336 (CN2011-ZH PDF)
LTC3822
OPERATION
(Refer to Functional Diagram)
Frequency Selection and Phase-Locked Loop
(FREQ Pins)
The selection of switching frequency is a tradeoff between
ef?ciency and component size. Low frequency opera-
tion increases ef?ciency by reducing MOSFET switching
losses, but requires larger inductance and/or capacitance
to maintain low output ripple voltage.
The switching frequency of the LTC3822 is controlled
via the FREQ pin. The FREQ pin can be ?oated, tied to
V IN or tied to GND to select 550kHz, 750kHz or 300kHz,
respectively.
Undervoltage Lockout
To prevent operation of the power supply below safe input
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to V IN
selects A = 5/3; tying IPRG to GND selects A = 2/3. The
maximum value of V ITH is typically about 1.98V, so the
maximum sense voltage allowed across the external
N-channel MOSFET is 120mV, 82mV or 200mV for the
three respective states of the IPRG pin.
However, once the controller’s duty cycle exceeds 20%,
slope compensation begins and effectively reduces the peak
sense voltage by a scale factor (SF) given by the curve
in Figure 1.
The peak inductor current is determined by the peak sense
voltage and the on-resistance of the external N-channel
MOSFET:
voltage levels, an undervoltage lockout is incorporated in
the LTC3822. When the input supply voltage (V IN ) drops
below 2.25V, the external MOSFETs and all internal circuits
I PK =
Δ V SENSE(MAX)
R DS(ON)
are turned off except for the undervoltage block, which
draws only a few microamperes.
Peak Current Sense Voltage Selection and Slope
Compensation (IPRG Pin)
When the LTC3822 controller is operating below 20% duty
cycle, the peak current sense voltage (between the V IN and
SW pins) allowed across the external top-side MOSFET
is determined by:
Boost Capacitor Refresh Timeout
In order to maintain suf?cient charge across C B , the
converter will brie?y turn off the top MOSFET and turn on
the bottom MOSFET if at any time the bottom MOSFET
has remained off for 10 switching cycles. This most
commonly occurs in a dropout situation.
Δ V SENSE(MAX) = A ?
V ITH – 0.7V
10
110
100
90
80
70
60
50
40
30
20
10
0
0
10 20 30 40 50 60 70 80 90 100
DUTY CYCLE (%)
3822 F01
Figure 1. Maximum Peak Current vs Duty Cycle
3822fa
9
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