参数资料
型号: LTC3850IUF#TRPBF
厂商: Linear Technology
文件页数: 29/38页
文件大小: 0K
描述: IC REG CTRLR BUCK PWM CM 28-QFN
产品培训模块: LTC3850 Dual Output DC/DC Switching Regulator Controller
标准包装: 2,500
系列: PolyPhase®
PWM 型: 电流模式
输出数: 2
频率 - 最大: 860kHz
占空比: 97.2%
电源电压: 4 V ~ 30 V
降压:
升压:
回扫:
反相:
倍增器:
除法器:
Cuk:
隔离:
工作温度: -40°C ~ 85°C
封装/外壳: 28-WFQFN 裸露焊盘
包装: 带卷 (TR)
LTC3850/LTC3850-1
APPLICATIONS INFORMATION
R D =
R SENSE(EQUIV) 7m ?
26.4m ?
DCR MAX at T L(MAX)
? 0.18
7m ?
39.6m ?
R1||R2 =
=
= 1.1k ; and
= 1.1k
( 5 ) 2 [ 1 + (0.005)(50 ° C – 25 ° C) ] ?
P MAIN =
( ) + ( ) 2 ? ? ? 5A2 ? ? ? ( ) ( ) ?
TheCoiltronics(Cooper)HCP0703-2R2(20mΩDCR MAX
at 20°C) and HCP0703-3R3 (30m? DCR MAX at 20°C) are
chosen. At 100°C, the estimated maximum DCR values are
26.4m? and 39.6m?. The divider ratios are:
= = 0.26;
and
For each channel, 0.1μF is selected for C1.
L 2.2μH
(DCR MAX at 20 ° C) ? C1 20m ? ? 0.1μF
3.3μH
30m ? ? 0.1μF
For channel 1, the DCR SENSE filter/divider values are:
The respective values for Channel 2 are R1 = 4.12k, R2 =
1.5k; and P LOSS R1 = 8mW.
Burst Mode operation is chosen for high light load efficiency
(Figure 15) by floating the MODE/PLLIN pin. Power loss
due to the DCR sensing network is slightly higher at light
loads than would have been the case with a suitable sense
resistor (7m?). At heavier loads, DCR sensing provides
higher efficiency.
The power dissipation on the topside MOSFET can be easily
estimated. Choosing a Siliconix Si4816BDY dual MOSFET
results in: R DS(ON) = 0.023?/0.016?, C MILLER @ 100pF.
At maximum input voltage with T(estimated) = 50°C:
3.3V
20V
0.023 ? 20V 2 ? 100pF
? 5 – 2.3 + 2.3 ? ( 500kHz ) = 186mW
R1 =
R1||R2
R D
=
1.1k
0.18
? 6.19k;
? ?
? 1 1 ?
=
? 1.33k
R2 =
P LOSS R1 = =
= 9mW
I SC = ( 1/ 3 ) 50mV – 1 ? 90ns(20V) ? = 2.1A
R1 ? R D 6.19k ? 0.18
1 ? R D 1 ? 0.18
The power loss in R1 at the maximum input voltage is:
(V IN(MAX) ? V OUT ) ? V OUT
R1
(20V ? 3.3V) ? 3.3V
6.19k
A short-circuit to ground will result in a folded back cur-
rent of:
? ?
0.007 ? 2 ? 3.3μH ?
with a typical value of R DS(ON) and d = (0.005/°C)(20)
= 0.1. The resulting power dissipated in the bottom
MOSFET is:
( 2.1A ) 2 ( 1.125 ) ( 0.016 ? )
P SYNC =
100
90
80
70
60
50
40
0.01
DCR
7m?
DCR
EFFICIENCY
POWER LOSS
0.1 1 10
LOAD CURRENT (mA)
10
1
0.1
0.01
20V – 3.3V
20V
= 66mW
which is less than under full-load conditions.
C IN is chosen for an RMS current rating of at least 2A at
temperature assuming only channel 1 or 2 is on. C OUT is
chosen with an ESR of 0.02? for low output ripple. The
output ripple in continuous mode will be highest at the
maximum input voltage. The output voltage ripple due to
ESR is approximately:
38501 F15
Figure 15. Design Example Efficiency vs Load
V ORIPPLE = R ESR (?I L ) = 0.02?(1.5A) = 30mV P–P
38501fc
29
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