参数资料
型号: LTC4252-2CMS8#TRPBF
厂商: LINEAR TECHNOLOGY CORP
元件分类: 电源管理
英文描述: Negative Voltage Hot Swap Controllers; Package: MSOP; No of Pins: 8; Temperature Range: 0°C to +70°C
中文描述: 2-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO8
封装: LEAD FREE, PLASTIC, MSOP-8
文件页数: 15/36页
文件大小: 336K
代理商: LTC4252-2CMS8#TRPBF
LTC4252-1/LTC4252-2
LTC4252A-1/LTC4252A-2
22
425212fc
APPLICATIONS INFORMATION
At time point 8, the load current falls and the SENSE voltage
drops below VACL(t). The analog current limit loop shuts
off and the GATE pin ramps further. At time point 9, the
SENSE voltage drops below VCB, the fault TIMER cycle
ends, followed by a 5.8μA discharge cycle (cool off). The
duration between time points 7 and 9 must be shorter than
one circuit breaker delay to avoid a fault time out during
GATE ramp-up. When GATE ramps past the VGATEH thresh-
old at time point 10, PWRGD pulls low. At time point11,
GATE reaches its maximum voltage as determined by VIN.
Live Insertion with Short Pin Control of UV/OV
In the example shown in Figure 10, power is delivered
through long connector pins whereas the UV/OV divider
makes contact through a short pin. This ensures the power
connections are firmly established before the LTC4252 is
activated. At time point 1, the power pins make contact
and VIN ramps through VLKO. At time point 2, the UV/OV
divider makes contact and its voltage exceeds VUVHI. In
addition, the internal logic checks for OV < VOVHI, GATE
< VGATEL, SENSE < VCB, SS < 20 VOS and TIMER <
VTMRL. If all conditions are met, an initial timing cycle
starts and the TIMER capacitor is charged by a 5.8μA
current source pull-up. At time point 3, TIMER reaches the
VTMRH threshold and the initial timing cycle terminates.
The TIMER capacitor is quickly discharged. At time point
4, the VTMRL threshold is reached and the conditions of
GATE < VGATEL, SENSE < VCB and SS < 20 VOS must be
GND – VEE OR
(–48RTN) – (–48V)
UV/OV
VIN
TIMER
GATE
VLKO
SENSE
VIN CLEARS VLKO, CHECK UV > VUVHI, OV < VOVLO, GATE < VGATEL, SENSE < VCB
OS AND TIMER < VTMRL
VOUT
12
3 4 56
7
8
VACL
VCB
9
TIMER CLEARS VTMRL, CHECK GATE < VGATEL, SENSE < VCB
OS
SS
DRAIN
PWRGD
DRN
5.8μA
OS
58μA
10 11
VIN – VGATEH
VDRNL
VDRNCL
CB + VOS)
ACL + VOS)
VGATEL
VTMRL
VTMRH
5.8μA
58μA
425212 F09
GATE
START-UP
INITIAL TIMING
Figure 9. System Power-Up Timing (All Waveforms Are Referenced to VEE)
相关PDF资料
PDF描述
LTC4252-2IMS8#PBF Negative Voltage Hot Swap Controllers; Package: MSOP; No of Pins: 8; Temperature Range: -40&deg;C to +85&deg;C
LTC4252-2IMS8#TRPBF Negative Voltage Hot Swap Controllers; Package: MSOP; No of Pins: 8; Temperature Range: -40&deg;C to +85&deg;C
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