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参数资料
| 型号： | LTC4252-2IMS8#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 28/36页 |
| 文件大小： | 328K |
| 描述： | IC CNTRLR HOTSWAP NEGVOLT 8-MSOP |
| 标准包装： | 50 |
| 类型： | 热交换控制器 |
| 应用： | 通用 |
| 内部开关： | 无 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 8-TSSOP，8-MSOP（0.118"，3.00mm 宽） |
| 供应商设备封装： | 8-MSOP |
| 包装： | 管件 |
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LTC4252-1/LTC4252-2
LTC4252A-1/LTC4252A-2
28
425212fe
For more information www.linear.com/LTC4252-1
applicaTions inForMaTion
Analog Current Limit and Fast Current Limit
In Figure 17a, when SENSE exceeds V
ACL
, GATE is
regulated by the analog current limit amplifier loop. When
SENSE drops below V
ACL
, GATE is allowed to pull up. In
Figure 17b, when a severe fault occurs, SENSE exceeds
V
FCL
and GATE immediately pulls down until the analog
current amplifier establishes control. If the severe fault
causes V
OUT
to exceed V
DRNCL
, the DRAIN pin is clamped
at V
DRNCL
. I
DRN
flows into the DRAIN pin and is multiplied
by 8. This extra current is added to the TIMER pull-up
current of 230礎. This accelerated TIMER current of
[230礎+8 " I
DRN
] produces a shorter circuit breaker fault
delay. Careful selection of C
T
, R
D
and MOSFET can help
prevent SOA damage in a low impedance fault condition.
Soft-Start
If the SS pin is not connected, this pin defaults to a linear
voltage ramp, from 0V to 2.2V in about 180祍 (or 0V to
1.4V in 230祍 for the LTC4252A) at GATE start-up, as
shown in Figure 18a. If a soft-start capacitor, C
SS
, is con-
nected to this SS pin, the soft-start response is modified
from a linear ramp to an RC response (Equation?), as
shown in Figure 18b. This feature allows load current to
slowly ramp-up at GATE start-up. Soft-start is initiated at
time point 3 by a TIMER transition from V
TMRH
to V
TMRL
(time points 1 to 2) or by the OV pin falling below the
V
OVLO
threshold after an OV condition. When the SS pin
is below 0.2V , the analog current limit amplifier holds
GATE low. Above 0.2V , GATE is released and 58礎 ramps
up the compensation network and GATE capacitance at
time point 4. Meanwhile, the SS pin voltage continues to
ramp up. When GATE reaches the MOSFETs threshold,
the MOSFET begins to conduct. Due to the MOSFETs high
g
m
, the MOSFET current quickly reaches the soft-start
control value of V
ACL
(t) (Equation 7). At time point 6, the
GATE voltage is controlled by the current limit amplifier.
The soft-start control voltage reaches the circuit breaker
voltage, V
CB
, at time point 7 and the circuit breaker TIMER
activates. As the load capacitor nears full charge, load
TIMER
GATE
SENSE
V
OUT
V
ACL
V
CB
SS
DRAIN
V
TMRH
230礎 + 8 " I
DRN
425212 F17
PWRGD
5.8礎
5.8礎
TIMER
GATE
SENSE
V
OUT
V
ACL
V
CB
V
FCL
SS
DRAIN
V
TMRH
V
DRNCL
230礎 + 8 " I
DRN
PWRGD
1
2
1
4
3
2
CB TIMES OUT
Figure 17. Current Limit Behavior (All Waveforms Are Referenced to V
EE
)
(17a) Analog Current Limit Fault
(17b) Fast Current Limit Fault
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LTC4252-2IMS8TR | 制造商:LINER 制造商全称:Linear Technology 功能描述:Negative Voltage Hot Swap Controllers |
| LTC4252-2IMS8TRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Negative Voltage Hot Swap Controllers |
| LTC4252-2IMSPBF | 制造商:Linear Technology 功能描述:Hot Swap Controller 1-Channel MSOP10 |
| LTC4252-2IMSTR | 制造商:LINER 制造商全称:Linear Technology 功能描述:Negative Voltage Hot Swap Controllers |
| LTC4252-2IMSTRPBF | 制造商:LINER 制造商全称:Linear Technology 功能描述:Negative Voltage Hot Swap Controllers |
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