参数资料
| 型号： | LTC4413EDD#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 6/12页 |
| 文件大小： | 0K |
| 描述： | IC IDEAL DIODE DUAL 10-DFN |
| 标准包装： | 121 |
| 应用： | 手持/移动设备 |
| FET 型： | P 沟道 |
| 输出数： | 2 |
| 内部开关： | 是 |
| 延迟时间 - 开启： | 11µs |
| 延迟时间 - 关闭： | 2µs |
| 电源电压： | 2.5 V ~ 5.5 V |
| 电流 - 电源： | 25µA |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 10-WFDFN 裸露焊盘 |
| 供应商设备封装： | 10-DFN（3x3） |
| 包装： | 管件 |
| 产品目录页面： | 1338 (CN2011-ZH PDF) |
LTC4413
TYPICAL PERFORMANCE CHARACTERISTICS
– I LEAK vs V REVERSE
Ef?ciency vs Load Current
Power Loss LTC4413 vs 1N5817
10E-6
80°C
1.00
600
40°C
1E-6
0°C
–40°C
0.98
500
400
0.96
100E-9
300
10E-9
0.94
0.92
200
100
1N5817
LTC4413
1E-9
0
1
2
3
4
5
0.90
1.0E-3
10.0E-3
100.0E-3 1.0E+0
10.0E+0
0
1
500
1000 1500
2000
2500
V REVERSE (V)
4413 G16
LOAD CURRENT (A)
1351 G13
I LOAD (mA)
4413 G19
PIN FUNCTIONS
INA (Pin 1): Primary Ideal Diode Anode and Positive
Power Supply. Bypass INA with a ceramic capacitor of at
least 1μF. 1Ω snub resistors in series with a capacitor and
higher valued capacitances are recommended when large
inductances are in series with this input. Limit slew rate
on this pin to less than 0.5V/μs. This pin can be grounded
when not used.
ENBA (Pin 2): Enable Low for Diode A. Weak (3μA) pull-
down. Pull this pin high to shut down this power path.
Tie to GND to enable. Refer to Table 1 for mode control
functionality. This pin can be left ?oating, weak pull-down
internal to the LTC4413.
GND (Pins 3, 11): Power and Signal Ground for the IC. The
exposed pad of the package, Pin 11, must be soldered to
PCB ground to provide both electrical contact to ground
and good thermal contact to the PCB.
ENBB (Pin 4): Enable Low for Diode B. Weak (3μA) pull-
down. Pull this pin high to shut down this power path.
Tie to GND to enable. Refer to Table 1 for mode control
functionality. This pin can be left ?oating, weak pull-down
internal to the LTC4413.
INB (Pin 5): Secondary Ideal Diode Anode and Positive
Power Supply. Bypass INB with a ceramic capacitor of at
higher valued capacitances are recommended when large
inductances are in series with this input. Limit slew rate
on this pin to less than 0.5V/μs. This pin can be grounded
when not used.
OUTB (Pin 6): Secondary Ideal Diode Cathode and Output.
Bypass OUTB with a high (1mΩ min) ESR ceramic capacitor
of at least 4.7μF. Limit slew rate on this pin to less than
0.5V/μs. This pin must be left ?oating when not in use.
NC (Pin 7): No Internal Connection.
NC (Pin 8): No Internal Connection.
STAT (Pin 9): Status Condition Indicator. Weak (9μA)
pull-down current output. When terminated, STAT = high
indicates diode conducting.
The function of the STAT pin depends on the mode that
has been selected. Table 2 describes the STAT pin output
current as a function of the mode selected as well as the
conduction state of the two diodes. This pin can also be
left ?oating or grounded.
OUTA (Pin 10): Primary Ideal Diode Cathode and Output.
Bypass OUTA with a high (1mΩ min) ESR ceramic capacitor
of at least 4.7μF. Limit slew rate on this pin to less than
0.5V/μs. This pin must be left ?oating when not in use.
least 1μF. 1Ω snub resistors in series with a capacitor and
4413fc
6
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