参数资料
型号: LTC660CS8#TRPBF
厂商: Linear Technology
文件页数: 9/12页
文件大小: 0K
描述: IC REG DBL INV ADJ 0.1A 8SOIC
标准包装: 2,500
类型: 倍增器,反相
输出类型: 可调式
输出数: 1
输出电压: -1.5 V ~ -5.5 V,5 V ~ 11 V
输入电压: 1.5 V ~ 5.5 V,2.5 V ~ 5.5 V
频率 - 开关: 10kHz,80kHz
电流 - 输出: 100mA
同步整流器:
工作温度: 0°C ~ 70°C
安装类型: 表面贴装
封装/外壳: 8-SOIC(0.154",3.90mm 宽)
包装: 带卷 (TR)
供应商设备封装: 8-SOIC
LTC660
TYPICAL APPLICATIO N S N
V B
(9V)
1
2
8
7
+V B /2 (4.5V)
Paralleling for Lower Output Resistance
Additional flexibility of the LTC660 is shown in Figures 11
+
C1
150 μ F
3
4
LTC660
6
5
–V B /2 (–4.5V)
and 12. Figure 11 shows two LTC660s connected in
parallel to provide a lower effective output resistance. If,
however, the output resistance is dominated by 1/fC1,
C2
150 μ F
increasing the capacitor size (C1) or increasing the fre-
quency will be of more benefit than the paralleling circuit
3V ≤ V B ≤ 11V
Figure 10. Battery Splitter
OUTPUT COMMON
LTC1046 ? TA10
shown.
Stacking for Higher Voltage
Figure 12 makes use of “stacking” two LTC660s to provide
even higher voltages. In Figure 12, a negative voltage
doubler or tripler can be achieved depending upon how
Pin 8 of the second LTC660 is connected, as shown
schematically by the switch.
V +
1
2
8
7
1
2
8
7
+
C1
150 μ F
3
4
LTC660
6
5
+
C1
150 μ F
3
4
LTC660
6
5
V OUT = –V +
1/4 CD4077
OPTIONAL SYNCHRONIZATION
CIRCUIT TO MINIMIZE RIPPLE
Figure 11. Paralleling for 200mA Load Current
C2
150 μ F
LTC660 ? F11
V +
FOR V OUT = –3V +
FOR V OUT = –2V +
1
2
8
7
150 μ F
1
2
8
7
+
150 μ F
3
4
LTC660
1
6
5
–V +
3
4
LTC660
2
6
5
V OUT
150 μ F
150 μ F
LTC660 ? F12
Figure 12. Stacking for High Voltage
9
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