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参数资料
| 型号： | LTC691ISW#PBF |
| 厂商： | Linear Technology |
| 文件页数： | 9/20页 |
| 文件大小： | 0K |
| 描述： | IC MPU SUPERVISRY CIRCUIT 16SOIC |
| 标准包装： | 47 |
| 类型： | 简单复位/加电复位 |
| 监视电压数目： | 1 |
| 输出： | 开路漏极或开路集电极 |
| 复位： | 高有效/低有效 |
| 复位超时： | 最小为 35 ms |
| 电压 - 阀值： | 4.65V |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 16-SOIC（0.295"，7.50mm 宽） |
| 供应商设备封装： | 16-SOIC |
| 包装： | 管件 |
LTC690/LTC691
LTC694/LTC695
APPLICATIONS INFORMATION
Microprocessor Reset
The LTC690 family uses a bandgap voltage reference
and a precision voltage comparator C1 to monitor the
5V supply input on V CC (see Block Diagram). When V CC
falls below the reset voltage threshold, the RESET output
is forced to active low state. The reset voltage threshold
accounts for a 5% variation on V CC , so the RESET output
becomes active low when V CC falls below 4.75V (4.65V
typical). On power-up, the RESET signal is held active low
for a minimum of 35ms for the LTC690/LTC691 (140ms
for the LTC694/LTC695) after reset voltage threshold is
reached to allow the power supply and microprocessor to
stabilize. The reset active time is adjustable on the LTC691/
LTC695. On power-down, the RESET signal remains active
low even with V CC as low as 1V. This capability helps hold
the microprocessor in stable shutdown condition. Figure
1 shows the timing diagram of the RESET signal.
The precision voltage comparator, C1, typically has 40mV
of hysteresis which ensures that glitches at V CC pin do
not activate the RESET output. Response time is typically
10μs. To help prevent mistriggering due to transient loads,
V CC pin should be bypassed with a 0.1μF capacitor with
the leads trimmed as short as possible.
The LTC691 and LTC695 have two additional outputs:
RESET and LOW?LINE . RESET is an active high output
and is the inverse of RESET . LOW?LINE is the output
of the precision voltage comparator C1. When V CC falls
below the reset voltage threshold, LOW?LINE goes low.
LOW?LINE returns high as soon as V CC rises above the
reset voltage threshold.
Battery Switchover
The battery switchover circuit compares V CC to the V BATT
input, and connects V OUT to whichever is higher. When
V CC rises to 70mV above V BATT , the battery switchover
comparator, C2, connects V OUT to V CC through a charge
pumped NMOS power switch, M1. When V CC falls to
50mV above V BATT , C2 connects V OUT to V BATT through a
PMOS switch, M2. C2 has typically 20mV of hysteresis to
prevent spurious switching when V CC remains nearly equal
to V BATT . The response time of C2 is approximately 20μs.
During normal operation, the LTC690 family uses a charge
pumped NMOS power switch to achieve low dropout and
low supply current. This power switch can deliver up to
50mA to V OUT from V CC and has a typical on resistance
of 5Ω. The V OUT pin should be bypassed with a capaci-
tor of 0.1μF or greater to ensure stability. Use of a larger
bypass capacitor is advantageous for supplying current
to heavy transient loads.
When operating currents larger than 50mA are required
from V OUT , or a lower dropout (V CC -V OUT voltage differential)
is desired, the LTC691 and LTC695 should be used.
V CC
V2
V1
V2
V1 = RESET VOLTAGE THRESHOLD
V2 = RESET VOLTAGE THRESHOLD +
RESET THRESHOLD HYSTERESIS
V1
RESET
t 1
t 1
t 1 = RESET ACTIVE TIME
LOW LINE
690 F01
Figure 1. Reset Active Time
690ff
For more information www.linear.com/690
9
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