参数资料
| 型号： | LV5050NV-TLM-E |
| 厂商： | ON Semiconductor |
| 文件页数： | 7/7页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 20-SSOP |
| 标准包装： | 2,000 |
| PWM 型： | 控制器 |
| 输出数： | 1 |
| 频率 - 最大： | 1.1MHz |
| 电源电压： | 4.5 V ~ 16 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -20°C ~ 85°C |
| 封装/外壳： | 20-LSSOP（0.173"，4.40mm 宽） |
| 包装： | 带卷 (TR) |
LV5050NV
Continued from preceding page.
Pin No.
14
15
16
17
18
19
20
Pin name
UV_DELAY
FB
COMP
SGND
VDD
LDRV
PGND
Description
UVP DELAY pin
By connecting a capacitor between this pin and SGND, the time until the IC latches off after detecting the UVP state can be
set. Also, after channel 1 terminated the soft-start function, when the output voltage becomes -80% or less for the setup
voltage, an external capacitor is charged by the constant current source of 8.6 μ A in the IC.
When this terminal voltage becomes 2.4V or more, the IC is latched off.
If an external capacitor is not connected, the IC is instantly latched off after detecting the UVP state.
Also, when this pin is shorted to GND, the UV_DELAY function is not operated.
Feed back input pin. The minus terminal (-) of the trans conductance amplifier is connected.
The voltage generated when the output voltage was divided by a resistor is input into this pin.
The converter operates so that this pin becomes an internal reference voltage (VREF=0.836V).
Also, this pin is monitored by the comparators UVP and OVP.
When the voltage of this pin becomes less than 87% of the set voltage, the PGOOD pin is low level.
A timer of the UV_DELAY function operates. Also, when the voltage of this pin becomes more than 117% of the set voltage,
the IC latches off.
The pin to connect a capacitor and a resistor for phase compensation.
The output of an internal transformer conductance amplifier is connected.
Connect an external phase compensation circuit between this pin and SGND.
The system ground of the IC. The reference voltage is generated based on this pin.
This pin is connected to the power supply system ground.
Power supply pin for the gate drive of an external lower-side MOS-FET.
This pin is connected to the VLIN5 pin through a filter.
The gate drive pin of an external lower-side MOS-FET.
This pin has the signal input part for prevention of short-through of both the upper and lower MOS-FETs.
When the voltage of this pin becomes less than 1V, the HDRV pin is turned on.
Power ground pin. This pin becomes the return current path of the LDRV pin.
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of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at
www.onsemi.com/site/pdf/Patent-Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no
warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the
application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental
damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual
performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical
experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use
as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in
which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for
any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors
harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or
death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the
part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PS No.A1159-7/7
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| LV5050V | 制造商:SANYO 制造商全称:Sanyo Semicon Device 功能描述:CMOS IC DC / DC Converter Controller |
| LV5050V-TLM-E | 功能描述:DC/DC 开关控制器 RoHS:否 制造商:Texas Instruments 输入电压:6 V to 100 V 开关频率: 输出电压:1.215 V to 80 V 输出电流:3.5 A 输出端数量:1 最大工作温度:+ 125 C 安装风格: 封装 / 箱体:CPAK |
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