参数资料
| 型号： | LV5052V-TLM-E |
| 厂商： | ON Semiconductor |
| 文件页数： | 6/9页 |
| 文件大小： | 0K |
| 描述： | IC REG CTRLR BUCK PWM 30SSOP |
| 标准包装： | 1,000 |
| PWM 型： | 控制器 |
| 输出数： | 2 |
| 频率 - 最大： | 1.1MHz |
| 电源电压： | 9.4 V ~ 16 V |
| 降压： | 是 |
| 升压： | 无 |
| 回扫： | 无 |
| 反相： | 无 |
| 倍增器： | 无 |
| 除法器： | 无 |
| Cuk： | 无 |
| 隔离： | 无 |
| 工作温度： | -20°C ~ 85°C |
| 封装/外壳： | 30-LSSOP（0.220"，5.60mm 宽） |
| 包装： | 带卷 (TR) |
LV5052V
Pin Functions
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Pin name
VDD
LDRV
HDRV1
SW1
CBOOT1
VLIN5
COMP1
FB1
RSNS1
ILIM
TD
SS1
PGOOD
UV_DELAY
Description
Power supply pin for the gate drive of an external lower-side MOS-FET.
This pin is connected to the VLIN5 pin through a filter.
The gate drive pin of an external lower-side MOS-FET of channel 1.
This pin has the signal input part for prevention of short-through of both the upper and lower MOS-FETs.
When the voltage of this pin becomes less than 1V, the HDRV pin is turned on.
The gate drive pin for an external upper side MOS-FET of channel 1.
This pin is connected with the switching node of channel 1.
A source of an external upper side MOSFET and a drain of an external lower side MOS-FET are connected with this pin.
This pin becomes the return current path of the HDRV pin.
This pin is connected with a transistor drain of the discharge MOS-FET for SOFT STOP in the IC (typical 30 Ω ). Also, this
pin has the signal output part for the short through prevention of both the upper and lower MOS-FETs.
When this terminal voltage becomes 1V or less for PGND, the LDRV pin is turned on.
The bootstrap capacity connection pin of channel 1.
The gate drive power of upper MOSFET is provided by this pin.
This pin is connected to the VDD pin through a diode and is connected to the SW pin through the bootstrap capacity.
The output pin of an internal regulator of 5V. the current is provided by the VIN pin.
Also, power supply of the control circuit in the IC is provided by this pin. Connect an output capacitor of 4.7 μ F between this
pin and SGND. A regulator of 5V operates, even if the IC is in the standby state. This pin is monitored by an UVLO function
and the IC starts by the voltage of 4.5V or more (the IC is off by the voltage of 4.0V or less.)
The phase compensation pin of channel 1.
The output of an internal transformer conductance amplifier is connected.
Connect an external phase compensation circuit between this pin and SGND.
Feed back input pin of channel 1.
The minus terminal (-) of the trans conductance amplifier is connected.
The voltage generated when the output voltage was divided by a resistor is input into this pin.
The converter operates so that this pin becomes an internal reference voltage (VREF=0.8V).
Also, this pin is monitored by the comparators UVP and OVP.
When the voltage of this pin becomes less than 82% of the set voltage, the PGOOD pin is low level.
A timer of the UV_DELAY function operates. Also, when the voltage of this pin becomes more than 117% of the set voltage,
the IC latches off.
Channel 1 side input pin of the over current detection comparator / the current detection amplifier.
To detect resistance, this pin is connected to the under side of a resistor for the current detection between the VIN pin and
the DRAIN of the upper MOS-FET. Also, to use the ON resistance of MOS-FET for the current detection, connect this pin to
the SOURCE of the upper MOS-FET. To prevent the common impedance of main current to the detection-voltage, this pin
is connected by independent wiring.
The pin to set the trip point for over current detection of channel 1.
Since the SINK current source of 85 μ A (ILIM) is connected in the IC, the over-current detection voltage (ILIM × RLIM) is
generated by connecting a resistor RLIM between this pin and the VIN pin.
The over-current is detected by comparing the voltage between the VIN pin and the ILIM pin to the current detection
resistance RSNS or both end voltage of the upper MOSFET.
Start-up delay pin of channel 1.
The time until the IC starts after releasing POR is set by connecting a capacitor between this pin and SGND.
After releasing POR, an external capacitor is charged up by the constant current source of 3.5 μ A in the IC.
When this terminal voltage becomes 2.6V or more, The IC starts. Also, when this terminal voltage becomes 2.6V or less,
The IC becomes the standby state. If external capacitor is not connected, the IC instantly starts after releasing POR.
The pin to connect a capacitor for soft start of channel 1.
After releasing POR, when the voltage of the TD pin becomes 2.6V or more, the SS1 pin is charged by an internal constant
current source of 3.5 μ A. Since this pin is connected to the positive (+) input of the transformer conductance amplifier, the
ramp-up wave form of the SS pin becomes the ramp-up wave form of the output.
During POR operations and after the UV_DELAY time-out, the SS1 pin is discharged
The power good pin of channel 1. The open drain MOS-FET of the withstand of 28V is connected in the IC.
When the output voltage of channel 1 is less than -13% for the setup voltage, the low level is output.
This pin has hysteresis of about (VREF × 4.0%).
Common UVP DELAY pin to channel 1 and channel 2.
By connecting a capacitor between this pin and SGND, the time until the IC latches off after detecting the UVP state can be
set. Also, after channel 1 or channel 2 terminated the soft-start function, when the output voltage becomes 82% or less for
the setup voltage, an external capacitor is charged by the constant current source of 8.6 μ A in the IC.
When this terminal voltage becomes 2.6V or more, the IC is latched off.
If an external capacitor is not connected, the IC is instantly latched off after detecting the UVP state.
Also, when this pin is shorted to GND, the UV_DELAY function is not operated.
Continued on next page.
No.A1394-6/9
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