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参数资料
| 型号： | LV5256GP-TE-L-E |
| 厂商： | ON Semiconductor |
| 文件页数： | 6/9页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK BOOST SYNC ADJ VCT20 |
| 标准包装： | 2,000 |
| 类型： | 降压（降压），升压（升压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1 V ~ 14 V |
| 输入电压： | 4.5 V ~ 10 V |
| 频率 - 开关： | 300kHz ~ 1.5MHz |
| 电流 - 输出： | 600mA |
| 同步整流器： | 是 |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-VCT（3x3） |
LV5256GP
Pin Functions
Pin No.
1
NC
Pin Name
Description
No connection. Must be kept open.
Equivalent Circuit
2
6
3
ONOFF
ON/OFF signal input pin.
Threshold level is TTL level.
VDD
Maximum withstand voltage is VDD.
3
4
VIN
Power supply pin of the IC. Apply the input voltage.
5
DU_SLE
Step-up/down switching pin. The IC goes in step-up mode
by connecting this pin to REG_O pin, and in step-down
VDD
mode by connecting this pin to GND or leaving this pin
open. An internal pull-down resistor (200k Ω ) is provided
between DU_SEL and GND pins.
5
200k Ω
7
PGND
Power ground pin. The source of the output transistor
(Nch-MOSFET) is connected.
8
SW
Switching element. A 0.7 Ω (typ) Nch switch is inserted
between this pin and PGND, and a 0.7 Ω (typ) Pch switch is
VOUT
connected between this pin and VOUT. In step-down
mode, insert an inductor between the switching node and
power supply output, and in step-up mode insert an
inductor between this pin and power supply input.
8
9
10
11
VOUT
VOUT-5
OCP
Source potential of the internal Pch-MOSFET. In
step-down mode, apply the input voltage. In step-up mode,
apply the power supply voltage.
Internal Pch-MOSFET gate suplly voltage generation pin.
Used to generate a voltage with a level equal to VOUT pin
voltage-5V by the internal LDO with OCP.
Overcurrent detection timer setup pin. Connect a capacitor
between this pin and ground to define the time interval
between the beginning of the overcurrent state and the IC
latches off. The capacitor is charged by the 10 μ A internal
constant current source. If the OCP_SEL pin is kept open
or connected to GND, the IC identifies a short-circuit and
VIN
REG_O
10 μ A
10k Ω
starts the timer counter when the voltage at the IN pin falls
below 0.8 times the voltage of Vref, TRAC_IN or SS,
11
500 Ω
1k Ω
whichever is lower. If the OCP_SEL pin is connected to
REG_O, the IC compares the voltage at the IN pin with 0.4
times the voltage. When the voltage at this pin goes
beyond 1.25V, the IC latches off. The latch-off state is
reset by the off signal at the ON/OFF pin or the UVLO lock.
12
REG_O
3.3V regulator output pin.
VIN
12
50 Ω
32k Ω
20k Ω
Continued on next page.
No.A1277-6/9
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