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参数资料
| 型号： | LV5256GP-TE-L-E |
| 厂商： | ON Semiconductor |
| 文件页数： | 8/9页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK BOOST SYNC ADJ VCT20 |
| 标准包装： | 2,000 |
| 类型： | 降压（降压），升压（升压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 1 V ~ 14 V |
| 输入电压： | 4.5 V ~ 10 V |
| 频率 - 开关： | 300kHz ~ 1.5MHz |
| 电流 - 输出： | 600mA |
| 同步整流器： | 是 |
| 工作温度： | -20°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 20-WFQFN |
| 包装： | 带卷 (TR) |
| 供应商设备封装： | 20-VCT（3x3） |
LV5256GP
Continued from preceding page.
Pin No.
18
RT
Pin Name
Description
Oscillation frequency setting pin. Connect a resistor
between this pin and GND. A 100k Ω resistor causes the
VDD
Equivalent Circuit
oscillator to oscillate at 1MHz (typ.).
18
500 Ω
10k Ω
19
20
VDD
LGND
Logic system power supply. Apply 3.0V ± 0.1V to this pin
from an external source.
Logic system ground pin. All voltages are measured with
respect to this voltage level.
Startup Sequence
VDD
ONOFF
VIN
ONOFF:H
REG_O startup
REG_O
UVLO release
VOUT-5 startup
VOUT-5
VOUT-5 normal judgment
SS start
SS
SW
Power supply operation beginning
* Be sure to set the ONOFF to 0V when starts or stops VDD. And apply voltage to VIN after VDD started up.
No.A1277-8/9
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