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参数资料
| 型号： | LV8162TT |
| 厂商： | SANYO SEMICONDUCTOR CO LTD |
| 元件分类： | 运动控制电子 |
| 英文描述： | BRUSH DC MOTOR CONTROLLER, 0.7 A, PDSO12 |
| 封装： | 0.150 INCH, MSOP-12 |
| 文件页数： | 6/7页 |
| 文件大小： | 221K |
| 代理商： | LV8162TT |
LV8162TT
No.A1978-6/8
Timing Chart
Standby/Opearte switchover
*1 TSLP=750s(Typ)
*2 If the PWM signal is held low during the TSLP period and no FG signal switching occurs during the LT1 period, the
IC enters standby mode.
Only when the power is turned on, if the PWM signal is held low during the TSLP period, the IC enters standby
mode.
*3 The FG pin is off and the RD pin is low in standby mode.
Lock protection
*1 Both OUT1 and OUT2 are low when lock protection mode is established.
*2 In the lock protection period, RD is set to off. After lock protection mode is released, RD is set to low when FG signal
is switched (OFF → L or L → OFF)
*3 If PWM is held low for a period longer than the TSLP when lock protection mode is established, the IC enters standby
mode.
*4 Driving starts at 50% duty cycle when the power is turned on, lock protection mode is released, or the IC is returned
from standby mode. (period during which FG switches 5 or 6 times)
FG
IN2
IN1
Waiting for FG pulse
LT1
OUT1
OUT2
Fan conetrained
Fan constraint released
Lock protection
LT2
Power OFF
Power ON
Reboot
FG detection
RD
VCC
PWM
FG
IN2
IN1
HB
Active
Standby
Active
Standby
Active
TSLP
TSLP
Waiting for FG pulse
LT1
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