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| 型号： | LXT334&LXT304A |
| 英文描述： | LXT334 & LXT304A - LXT334 & LXT304A ?Low Cost & High Performance Quad E1 Interface Solution |
| 中文描述： | LXT334 |
| 文件页数： | 19/32页 |
| 文件大小： | 395K |
| 代理商： | LXT334&LXT304A |
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Dual T1/E1 Line Interface Unit
—
LXT331
Datasheet
19
2.5
Initialization & Reset
Upon initial power up, the transceiver is held static until the power supply reaches approximately 3
V. Upon crossing this threshold, the device clears all internal registers. TCLK is the transmit
reference, and MCLK is the bias reference. The PLLs are continuously calibrated.
The transceiver can be reset from the Host or Hardware mode. In Host mode, reset is commanded
by writing 1s to TST and ALOOP, and a 0 to TAOS (bits D5, D6 and D7, respectively, of the SIO
input data byte). In either mode, reset is commanded by holding the TRSTE pin High for
approximately 200 ns. All output signals are tri-stated at this time. In Hardware mode, the falling
edge of TRSTE initiates reset for the entire chip. Host mode resets the selected port SIO registers
to 0. Reset is not generally required for the port to be operational.
Figure 9. TAOS with Analog Loopback
Figure 10. Analog Loopback
Timing &
Control
TTIP
TRING
RTIP
RRING
Transmit All Ones =ALOOP
with ALOOP
TAOS
TCLK
TPOS
TNEG
1
TAOS
1
PMRK
NMRK
Timing &
Control
TTIP
TRING
RTIP
RRING
Analog Loopback
ALOOP
1
TAOS
0
PMRK
NMRK
TCLK
TPOS
TNEG
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相关代理商/技术参数 |
参数描述 |
|---|---|
| LXT335 | 制造商:LVL1 制造商全称:LVL1 功能描述:Quad Short Haul PCM Analog Interface |
| LXT336QE | 制造商:未知厂家 制造商全称:未知厂家 功能描述:PCM RECEIVER|QUAD|CEPT PCM-30/E-1|CMOS|QFP|64PIN|PLASTIC |
| LXT350 | 制造商:LVL1 制造商全称:LVL1 功能描述:Integrated T1/E1 S/H Transceivers With Crystal-less Jitter Attenuation |
| LXT350PE | 制造商:Intel 功能描述: |
| LXT350QE | 制造商:LEVEL1 功能描述: |
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