参数资料
型号: M25P32VMN6G
厂商: 意法半导体
元件分类: FLASH
英文描述: 4 Mbit Uniform Sector, Serial Flash Memory
中文描述: 4兆位统一部门,串行闪存
文件页数: 18/39页
文件大小: 506K
代理商: M25P32VMN6G
25/39
M25P32
Release from Deep Power-down and Read
Electronic Signature (RES)
Once the device has entered the Deep Power-
down mode, all instructions are ignored except the
Release from Deep Power-down and Read Elec-
tronic Signature (RES) instruction. Executing this
instruction takes the device out of the Deep Pow-
er-down mode.
The instruction can also be used to read, on Serial
Data Output (Q), the old-style 8-bit Electronic Sig-
nature, whose value for the M25P32 is 15h.
Please note that this is not the same as, or even a
subset of, the JEDEC 16-bit Electronic Signature
that is read by the Read Identifier (RDID) instruc-
tion. The old-style Electronic Signature is support-
ed for reasons of backward compatibility, only, and
should not be used for new designs. New designs
should, instead, make use of the JEDEC 16-bit
Electronic Signature, and the Read Identifier
(RDID) instruction.
Except while an Erase, Program or Write Status
Register cycle is in progress, the Release from
Deep Power-down and Read Electronic Signature
(RES) instruction always provides access to the
old-style 8-bit Electronic Signature of the device,
and can be applied even if the Deep Power-down
mode has not been entered.
Any Release from Deep Power-down and Read
Electronic Signature (RES) instruction while an
Erase, Program or Write Status Register cycle is in
progress, is not decoded, and has no effect on the
cycle that is in progress.
The device is first selected by driving Chip Select
(S) Low. The instruction code is followed by 3
dummy bytes, each bit being latched-in on Serial
Data Input (D) during the rising edge of Serial
Clock (C). Then, the old-style 8-bit Electronic Sig-
nature, stored in the memory, is shifted out on Se-
rial Data Output (Q), each bit being shifted out
during the falling edge of Serial Clock (C).
The instruction sequence is shown in Figure 20..
The Release from Deep Power-down and Read
Electronic Signature (RES) instruction is terminat-
ed by driving Chip Select (S) High after the Elec-
tronic Signature has been read at least once.
Sending additional clock cycles on Serial Clock
(C), while Chip Select (S) is driven Low, cause the
Electronic Signature to be output repeatedly.
When Chip Select (S) is driven High, the device is
put in the Standby Power mode. If the device was
not previously in the Deep Power-down mode, the
transition to the Standby Power mode is immedi-
ate. If the device was previously in the Deep Pow-
er-down mode, though, the transition to the
Standby Power mode is delayed by tRES2, and
Chip Select (S) must remain High for at least
tRES2(max), as specified in Table 14.. Once in the
Standby Power mode, the device waits to be se-
lected, so that it can receive, decode and execute
instructions.
Figure 20. Release from Deep Power-down and Read Electronic Signature (RES) Instruction
Sequence and Data-Out Sequence
Note: The value of the 8-bit Electronic Signature, for the M25P32, is 15h.
C
D
AI04047C
S
Q
23
2
1
3456789 10
28 29 30 31 32 33 34 35
22 21
3210
36 37 38
765432
0
1
High Impedance
Electronic Signature Out
Instruction
3 Dummy Bytes
0
MSB
Stand-by Mode
Deep Power-down Mode
MSB
tRES2
相关PDF资料
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