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参数资料
型号： M30100M6T-XXXFP
元件分类： 微控制器/微处理器
英文描述： 16-BIT, MROM, 16 MHz, MICROCONTROLLER, PQFP32
封装： 7 X 7 MM, 0.80 MM PITCH, PLASTIC, LQFP-32
文件页数： 123/163页
文件大小： 1678K
代理商： M30100M6T-XXXFP
Under
development
Tentative Specifications REV.E
Specifications in this manual are tentative and subject to change.
Mitsubishi microcomputers
M30100/M30102 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
Timer X
62
Timer X
Timer X is an 8-bit timer with an 8-bit prescaler. Figure 1.14.3 shows the block diagram of Timer X.
Figures 1.14.4 and 1.14.5 shows the Timer X-related registers.
Timer X has the five operation modes listed as follows:
Timer mode:
The timer counts an internal count source (clock source).
Pulse output mode:
The timer counts an internal count source and outputs the pulses
whose polarity is inverted at the timer the timer underflows.
Event counter mode:
The timer counts pulses from an external source.
Pulse width measurement mode: The timer measures an external pulse's pulse width.
Pulse period measurement mode:The timer measures an external pulse's period.
Clock source
selection
Timer
Pulse period
measurement
Pulse output
f1
f8
f32
Event counter
fC32
Toggle flip-flop
Polarity
switching
CNTR0
Q
T
CNTR0
interrupt
request bit
P30/TXOUT select bit
TXOUT
CNTR0 polarity
switching bit
"1"
"0"
R
Pulse width
measurement
Pulse output
Counter (8)
Reload register (8)
Counter (8)
Reload register (8)
Timer X count
start flag
Prescaler X (address 008C16)
Timer X (address 008D16)
Pulse output mode
Timer X latch write
Timer X interrupt
request bit
Peripheral data bus
fPX
Figure 1.14.3. Block diagram of Timer X
Timer X mode register
Symbol
Address
When reset
TXMR
008B16
000000002
Bit name
Function
Bit symbol
W
R
b7
b6 b5
b4
b3
b2
b1 b0
0 0 : Timer mode or
pulse period measurement mode
0 1 : Pulse output mode
1 0 : Event counter mode
1 1 : Pulse width measurement mode
b1 b0
TXMOD2
TXS
TXMOD1
R0EDG
TXMOD0
TXOCNT
CNTR0 polarity
switching bit
Operation mode
select bit 0, 1
Note 1: In the pulse output mode, the direction register of port P17 should be set to input.
Note 2: This bit should rewrite with inhibiting the CNTR0 interrupt.
Note 3: TXEDG and TXUND were added after the product Ver.3.0 of the flash memory edition
(M30100F3/M30102F3) after the product Ver.2.0 of the mask ROM edition ( M30100Mx/
M30102Mx). Nothing is assigned to the product before this.
0 : Rising edge
1 : Falling edge
Timer X count
start flag
0 : Stops counting
1 : Starts counting
P30/TXOUT
select bit
Operation mode
select bit 2
0 : Except in pulse period measurement mode
1 : Pulse period measurement mode
(Note 1)
Function varies with each operation mode
(Note 2)
TXEDG
TXUND
(Note 3)
Timer X under
flow flag
Function varies with each operation mode.
Effectaul edge
reception flag
Function varies with each operation mode.
Figure 1.14.4. Timer X-related registers (1)
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