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参数资料
| 型号： | M30245FCGP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 16 MHz, MICROCONTROLLER, PQFP100 |
| 封装： | PLASTIC, LQFP-100 |
| 文件页数： | 69/244页 |
| 文件大小： | 3535K |
| 代理商： | M30245FCGP |
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Serial Communication
Specifications in this manual are tentative and subject to change
Rev. E
MITSUBISHI MICROCOMPUTERS
M30245 Group
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
160
Overview
The Serial Sound Interface is a serial data communication system. The parallel (MCU bus) to serial data
conversion is accomplished by the shift registers. Figure 1.121 shows a description of each component of
the Serial Sound Interface architecture. There are separate 32- bit shift registers for transmit and receive for
full duplex operation. Each shift register can be configured for 32, 24, or 16 bits as defined by the channel
width mode bits. The shift register loads (or stores for receiver) data from the data buffers on every WS
edge. The first load and bit-shift begins on the first “valid” edge of WS (as defined by the mode bits) after
the transmit/receive mode bits are set (see Figure 1.122). Therefore, the transmit data buffers must be
loaded prior to enabling the transmitter to ensure that the first transmit contains valid data.
Both the transmitter and receiver have their own set of data buffers. There are two data buffers (left and
right) so that, on special conditions when the MCU is handling a higher priority task, additional time is
available (channel width X TSCK) before there is data underflow or overflow. The shift register always loads
from or stores to the left buffer first and alternates between the two buffers on every edge of WS. The
placement of data within the buffers is described in detail in the Data Path section.
The interrupt generator is a state machine which controls the data interface. The state machine makes the
data transfer to or from the peripheral more efficient by generating interrupts until all the data needed for the
data buffer has been accessed. The interrupt can be set up to be a DMA trigger for more efficient data
transfer. The interrupt generator also tracks the read/write width (byte/word) so that no additional control is
needed. The interrupt is first generated when a data word is loaded from the data buffer to the shift register
(transmitter) or data are stored from the shift register into the data buffer (receiver). When the MCU is
finished accessing (as a response to the interrupt) another interrupt is generated if the data buffer has not
completely been accessed. For example, for a 24-bit transmitter, an interrupt is generated when the left
buffer is loaded into the shift register. If the MCU writes a byte of data to the transmit buffer address, 8 of
the 24 bits will be filled with new data. The interrupt generator triggers another interrupt causing the MCU to
write more data. If this write is a 16-bit operation, no further interrupts are generated until the right buffer is
loaded into the shift register. However, if the write operation is only 8 bit, then another interrupt is generated
immediately.
The data interface is used to simplify the data transfer process. The data buffer address is the same
regardless of the actual data buffer width. The interface places the incoming or outgoing data in the correct
position according to the channel width and the number of completed reads/writes for the data buffer.
The operation of the data interface is demonstrated in the example below which is the case of 24-bit audio
data with word writes. As previously explained, the state machine generates an interrupt when the left
channel is loaded into the shift register for transmission. When the first word write occurs, the data interface
places the data in the left buffer. Since 8 more bits are required to fully load the left buffer, another interrupt
is generated. The MCU writes another word of data, of which one byte is placed in the left buffer. However,
the remaining data is held in a temporary buffer within the data interface since the right channel may not be
loaded into the shift register yet. If the data is not held in a temporary buffer but written to the right buffer, it
would overwrite the untransmitted data in the right buffer. When the right buffer is eventually loaded into the
shift register for transmission, the state machine generates an interrupt to request additional data. An MCU
word write causes the data in the temporary buffer, as well as the data on the MCU data bus, to be placed
in the right buffer. No further interrupts are generated because all data buffers are filled.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M30245FCGP#U1 | 功能描述:IC M16C/24 MCU FLSH 128K 100LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:M16C™ M16C/20 标准包装:1 系列:87C 核心处理器:MCS 51 芯体尺寸:8-位 速度:16MHz 连通性:SIO 外围设备:- 输入/输出数:32 程序存储器容量:8KB（8K x 8） 程序存储器类型:OTP EEPROM 大小:- RAM 容量:256 x 8 电压 - 电源 (Vcc/Vdd):4 V ~ 6 V 数据转换器:- 振荡器型:外部 工作温度:0°C ~ 70°C 封装/外壳:44-DIP 包装:管件 其它名称:864285 |
| M30245FC-XXXFP | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30245FC-XXXGF | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30245FC-XXXGP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
| M30245FG | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER |
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