M306H5MG-XXXFP/MC-XXXFP/FGFP
Rev.1.20
Dec 13, 2005
page 250 of 323
REJ03B0095-0100Z
5.5
Typ.Max.
Unit
Parameter
VCC1, VCC2
VDD2, VDD3
5.0
Supply voltage (VCC1 ≤ VCC2)
Symbol
Min.
Standard
Analog supply voltage
VCC2
AVcc
V
0
Analog supply voltage
Supply voltage
VIH
I OH (avg)
HIGH average
output current
mA
Vss
AVss
0.8VCC2
V
VCC2
0.2VCC2
0.2VCC1
0.2VCC2
0
LOW input
voltage
0.16VCC2
I OH (peak)
H
CVIN, SYNCIN
2V P-P
Composite video input voltage
IGH peak output
current (Note2, Note3)
HIGH input
voltage
-5.0
-10.0
P00 to P07, P10 to P17, P20 to P27,P30 to P37,
P40 to P47, P50 to P57, P60 to P67,P72 to P77,
P
P11
80 to P84,P86,P87,P90 to P97,P100 to P107,
P31 to P37, P40 to P47, P50 to P57
V
0.8VCC2
0.5VCC2
VCC2
(data input during memory expansion and microprocessor modes)
P00 to P07, P10 to P17, P20 to P27, P30 (during single-chip mode)
P00 to P07, P10 to P17, P20 to P27, P30
LOW peak output
current
10.0
5.0
mA
f (XIN)
Main clock input oscillation frequency
(Note 4)
LOW average
output current
I OL (peak)
mA
I OL (avg)
V
P00 to P07, P10 to P17, P20 to P27,P30 to P37,
P40 to P47, P50 to P57, P60 to P67,P72 to P77,
P80 to P84,P86,P87,P90 to P97,P100 to P107,
P00 to P07, P10 to P17, P20 to P27,P30 to P37,
P40 to P47, P50 to P57, P60 to P67,P70 to P77,
P80 to P84,P86,P87,P90 to P97,P100 to P107,
P00 to P07, P10 to P17, P20 to P27,P30 to P37,
P40 to P47, P50 to P57, P60 to P67,P70 to P77,
P80 to P84,P86,P87,P90 to P97,P100 to P107,
P70 , P71
0.8VCC
5.75
V
VIL
VCVIN
VCC2 =2.9 to 5.5V
0
MHz
16
f (XCIN)Sub-clock oscillation frequency
kHz
50
32.768
Note 1: R
When operating in microprocessor and memory expansion mode, use this device under the conditions of VCC = VCC1 = VCC2
= 4.5 to 5.5V at Topr = -20 to 70 °C
(If VCC1 and VCC2 are less than 4.0V, it cannot be used.)
eferenced to VCC = VCC1 = VCC2 = 2.0 to 5.5V at Topr = -20 to 70 °C unless otherwise specified.
Note 2: The mean output current is the mean value within 100ms.
Note 3: The total IOL (peak) for ports P0, P1, P2, P3, P4, P5, P86, P87, P9, P10 and P11 must be 80mA max. The total IOL (peak)
for ports P6, P7 and P80 to P84 must be 80mA max. The total IOH (peak) for ports P0, P1, and P2 must be -40mA max.
The total IOH (peak) for ports P3, P4 and P5 must be -40mA max. The total IOH (peak) for ports P6, P7, and P80 to P84
must be -40mA max. The total IOH (peak) for ports P86, P87, P9, P10 and P11 must be -40mA max.
Note 4: Use the VCC1 and VCC2 power supply voltage on the following conditions.
VCC1 = 3.00V to VCC2, VCC2 = 4.00V to 5.5V (at f(XIN) = 16MHz)
VCC1 = 2.90V to VCC2, VCC2 = 2.90V to 5.5V (at f(XIN) = 16MHz, at divide-by-8 or 16)
Note 5: Use in low power dissipation mode. When operating on low voltage (VCC = 3.0V), only single-chip mode can be used.
If the VCC2 supply voltage is less than 2.6 V, be aware that only the CPU, RAM, clock timer, interrupt, and Input/Output ports can be used.
Other control circuits (e.g., timers A and B, serial I/O, UART) cannot be used.
0.8VCC1
0.8VCC2
V
VCC1
P60 to P
P85 to P87, P90 to P97, P100 to P107,
XIN, RESET, CNVSS, BYTE, M1, START, TEST3
P85 to P87, P90 to P97, P100 to P107,
XIN, RESET, CNVSS, BYTE, M1, START, TEST3
67, P72 to P77, P80 to P84
P31 to P37, P40 to P47, P50 to P57
P00 to P07, P10 to P17, P20 to P27, P30 (during single-chip mode)
V
0.2VCC2
0
(data input during memory expansion and microprocessor modes)
P00 to P07, P10 to P17, P20 to P27, P30
P60 to P67, P70 to P77, P80 to P84
f (BCLK)
CPU operation clock
0
MHz
16
2.0
VCC2 =2.0 to 5.5V
(Note 5)
V
Table 3.2. Recommended Operating Conditions (Note 1)