- 您现在的位置：买卖IC网 > PDF目录45027 > M34506M2-XXXFP 4-BIT, MROM, MICROCONTROLLER, PDSO20 PDF资料下载
参数资料
| 型号： | M34506M2-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER, PDSO20 |
| 封装： | 5.30 X 12.60 MM, 1.27 MM PITCH, PLASTIC, SOP-20 |
| 文件页数： | 17/114页 |
| 文件大小： | 836K |
| 代理商： | M34506M2-XXXFP |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页当前第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页
5
5-2
INTERRUPT CONTROLLER (ICU)
32180 Group User’s Manual (Rev.1.0)
5.1 Outline of the Interrupt Controller
The Interrupt Controller (ICU) manages maskable interrupts from internal peripheral I/Os and a system break
interrupt (SBI). The maskable interrupts from internal peripheral I/Os are sent to the M32R CPU as external
interrupts (EI).
The maskable interrupts from internal peripheral I/Os are managed by assigning them one of eight priority levels
including an interrupt-disabled state. If two or more interrupt requests with the same priority level occur at the
same time, their priorities are resolved by predetermined hardware priority. The source of an interrupt request
generated in internal peripheral I/Os is identified by reading the relevant interrupt status register provided for
internal peripheral I/Os.
On the other hand, the system break interrupt (SBI) is recognized when a low-going transition occurs on the SBI#
signal input pin. This interrupt is used for emergency purposes such as when power outage is detected or a fault
condition is notified by an external watchdog timer, so that it is always accepted irrespective of the PSW register
IE bit status. When the CPU has finished servicing an SBI, shut down or reset the system without returning to the
program that was being executed when the interrupt occurred.
Specifications of the Interrupt Controller are outlined below.
Table 5.1.1 Outline of the Interrupt Controller (ICU)
Item
Specification
Interrupt request source
Maskable interrupt requests from internal peripheral I/Os: 32 sources (Note 1)
System break interrupt request: 1 source (entered from SBI# pin)
Priority management
8 priority levels including an interrupt-disabled state
(However, interrupts with the same priority level have their priorities resolved by fixed
hardware priority.)
Note 1: There are actually a total of 179 interrupt request resources when counted individually, which are grouped into 32
interrupt request resources.
5.1 Outline of the Interrupt Controller
相关PDF资料 |
PDF描述 |
|---|---|
| M34507E4FP | 4-BIT, OTPROM, MICROCONTROLLER, PDSO24 |
| M34507M2-XXXFP | 4-BIT, MROM, MICROCONTROLLER, PDSO24 |
| M34507M4-XXXFP | 4-BIT, MROM, MICROCONTROLLER, PDSO24 |
| M34507M2-XXXFP | 4-BIT, MROM, MICROCONTROLLER, PDSO24 |
| M34509G4FP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO24 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M34506M4 | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34506M4-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES |
| M34507E4FP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34507M2-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:4-BIT CISC SINGLE-CHIP MICROCOMPUTER 4500 SERIES |
| M34507M4-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
发布紧急采购，3分钟左右您将得到回复。