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参数资料
| 型号： | M34559G6FP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP52 |
| 封装： | 10 X 10 MM, 0.65 MM PITCH, PLASTIC, LQFP-52 |
| 文件页数： | 4/93页 |
| 文件大小： | 1810K |
| 代理商： | M34559G6FP |
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CLRC663
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Preliminary data sheet
COMPANY PUBLIC
Rev. 3.1 — 26 September 2011
171131
101 of 126
NXP Semiconductors
CLRC663
Contactless reader IC
17. Power management
17.1 Supply concept
The CLRC663 is supplies of VDD Supply voltage, PVDD pad supply and TVDD Tx
power supply. These three voltages are independent and can have different as well as
same supply voltage values. e.g. To operate with a 3.3 V supplied Microcontroller, PVDD
and VDD shall be 3.3 V, to guarantee maximum field strength TVDD shall be 5 V.
Note: None of this three voltages is allowed to be zero.
Independent of the voltage it is recommended to buffer these supplies with blocking
capacitances. VDD and PVDD min 100 nF; TVDD min 100 nF parallel to 1 F
NOTE: AVDD and DVDD are NO voltage inputs! Buffer them with blocking capacitances
of 470 nF each.
17.2 Power reduction mode
17.2.1 Power-down
A hard power-down is enabled with HIGH level on pin PDOWN. This turns off the internal
1.8 V voltage regulators for the analog and digital core Supply as well as the oscillator. All
digital input buffers are separated from the input pads and clamped internally (except pin
PDOWN itself). The output pins are switched to high impedance.
To leave the power-down mode the level at the pin PDOWN as to be set to LOW. This will
start the internal start up sequence. The reader IC is in full mode again when the internal
reset sequence is finished, the crystal reaches the point in the oscillation cycle where the
oscillation gets stable and the booting sequence is finished.
17.2.2 Standby mode
The standby mode is entered immediately after setting the bit PowerDown in the register
Command_Reg to 1. All internal current sinks are switched off (including the oscillator
buffer).
In opposition to the power-down mode, the digital input buffers are not separated by the
input pads and keep their functionality. The digital output pins do not change their state.
During standby mode, all registers values, the FiFo’s content and the configuration itself
will keep its current content.
To leave the standby mode the bit PowerDown in the register Command_Reg is set to 0.
This will start the internal start up sequence. The reader IC is in Full mode again when the
internal start up sequence is finished, the crystal reaches the point in the oscillation cycle
where the oscillation gets stable and the booting sequence is finished.
17.2.3 Modem OFF mode
When the ModemOff bit in the register Control_Reg is set to 1 the antenna transmitter and
the receiver are switched off.
To leave the modem OFF mode set the ModemOff bit in the register Control_Reg to 0.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M34559G6-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M3455AG8FP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M3455AG8-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M3455AGCFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M3455AGC-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
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