参数资料
型号: M34559G6FP
元件分类: 微控制器/微处理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PQFP52
封装: 10 X 10 MM, 0.65 MM PITCH, PLASTIC, LQFP-52
文件页数: 5/93页
文件大小: 1810K
代理商: M34559G6FP
CLRC663
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Preliminary data sheet
COMPANY PUBLIC
Rev. 3.1 — 26 September 2011
171131
102 of 126
NXP Semiconductors
CLRC663
Contactless reader IC
17.3 Low Power Card Detection (LPCD)
The low power card detection is a energy saving modus when the CLRC663 is not used
permanently.
The LPCD works in two phases. The standby phase, controlled with the Wake up timer 4,
which defines the duration of the standby of the CLRC663. Second phase is the
detection-phase. there the values of the I and Q channel are detected and stored in the
register map. (LPCD_I_Result_Reg, LPCD_Q_Result_Reg).This time period can be
handled with Timer3. The value is compared with the min/max values in the registers
(LPCD_IMin_Reg, LPCD_IMax_Reg; LPCD_QMin_Reg, LPCD_QMax_Reg). If it
exceeds the limits, a LPCDIrq will be raised.
After the command LPCD the standby of the CLRC663 is activated, if selected. The
wake-up timer 4 can activate the system after a given time. For the LPCD it is
recommended to set T4AutoWakeUp and T4AutoRestart, to start the timer and then go to
standby. If a card is detected the timer stops and the communication can be started. If
T4AutoWakeUp is not set, the IC will not enter Standby mode in case no card is detected.
17.4 Reset and startup time
A 10
s constant high level at the Reset pin starts the internal reset procedure.
The following figure shows the internal voltage regulator:
This internal procedure consists of two phases:
Power on reset
Startup time
When the CLRC663 has finished this two phases the reader IC is in Full mode an is ready
Fig 32. Internal PDown to voltage regulator logic
001aan360
PVDD
PDown
VSS
PEAK
FILTER
INTERNAL VOLTAGE
REGULATOR
VDD
VSS
1.8 V
AVDD
DVDD
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