- 您现在的位置：买卖IC网 > PDF目录69011 > M34570M8-XXXFP 4-BIT, MROM, MICROCONTROLLER, PDSO36 PDF资料下载
参数资料
| 型号： | M34570M8-XXXFP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 4-BIT, MROM, MICROCONTROLLER, PDSO36 |
| 封装： | 0.450 INCH, 0.80 MM PITCH, PLASTIC, SSOP-36 |
| 文件页数： | 6/32页 |
| 文件大小： | 319K |
| 代理商： | M34570M8-XXXFP |
第1页第2页第3页第4页第5页当前第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页
14
MITSUBISHI MICROCOMPUTERS
4570 Group
SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER
Program counter (PC)
..................................................... Each interrupt address
Stack register (SK)
........... The address of main routine to be executed when returning
Interrupt enable flag (INTE)
........................................................ 0 (Interrupt disabled)
Interrupt request flag (only the flag for the current interrupt source)
........................................................................................ 0
Data pointer, carry flag, registers A and B, skip flag
............... Stored in the interrupt stack register (SDP) automatically
Fig. 13 Program example of interrupt processing
(4) Internal state during an interrupt
The internal state of the microcomputer during an interrupt is
as follows (Figure 14).
Program counter (PC)
An interrupt address is set in program counter. The
address to be executed when returning to the main routine
is automatically stored in the stack register (SK).
Interrupt enable flag (INTE)
INTE flag is cleared to “0” so that interrupts are disabled.
Interrupt request flag
Only the request flag for the current interrupt source is
cleared to “0.”
Data pointer, carry flag, skip flag, registers A and B
The contents of these registers and flags are stored
automatically in the interrupt stack register (SDP).
(5) Interrupt processing
When an interrupt occurs, a program at an interrupt address
is executed after a branch to a sequence for storing data into
stack register is performed. Write the branch instruction to
an interrupt service routine at an interrupt address.
Use the RTI instruction to return to main routine.
Interrupt enabled by executing the EI instruction is performed
after executing 1 instruction (just after the next instruction is
executed). Accordingly, when the EI instruction is executed
just before the RTI instruction, interrupts are enabled after
returning to the main routine. (Refer to Figure 13)
Fig. 14 Internal state when interrupt occurs
Fig. 15 Interrupt system diagram
EI
RTI
Interrupt
service routine
Interrupt
occurs
Interrupt
is enabled
Main
routine
: Interrupt enabled state
: Interrupt disabled state
T1F
V12
EXF0
V10
Address 4 in
page 1
Address 0 in
page 1
T2F
V13
Address 6 in
page 1
Timer 1
underflow
Request
flag
(state retained)
Enable
bit
Enable
flag
Activated
condition
INT pin
(L
→ H or
H
→ L input)
INTE
Timer 2
underflow
T3F
V20
Timer 3
underflow
Address 8 in
page 1
相关PDF资料 |
PDF描述 |
|---|---|
| M34570EDFP | 4-BIT, OTPROM, MICROCONTROLLER, PDSO36 |
| M34584EDFP | 4-BIT, OTPROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| M34584MD-XXXFP | 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDSO42 |
| M35017-001FP | 24 X 10 CHARACTERS CRT CHAR DSPL CTLR, PDSO20 |
| M35040-001FP | 24 X 10 CHARACTERS CRT CHAR DSPL CTLR, PDSO20 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M34570MD | 制造商:MITSUBISHI 制造商全称:Mitsubishi Electric Semiconductor 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34570MD-XXXFP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34570N4232FP | 制造商:MITS 功能描述:New |
| M34571G4 | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
| M34571G4FP | 制造商:RENESAS 制造商全称:Renesas Technology Corp 功能描述:SINGLE-CHIP 4-BIT CMOS MICROCOMPUTER |
发布紧急采购，3分钟左右您将得到回复。