参数资料
型号: M35500BGP
元件分类: 显示控制器
英文描述: FLUORESCENT DSPL CTRL, PQFP44
封装: 10 X 10 MM, 0.80 MM PITCH, PLASTIC, QFP-44
文件页数: 16/16页
文件大小: 169K
代理商: M35500BGP
9
MITSUBISHI <DIGITAL ASSP>
M35500AFP/BGP
FLD(VFD) CONTROLLER
RESET CIRCUIT
To reset the controller, the RESET pin should be held at a “L” level
for 2
s or more. Then the RESET pin is returned to an “H” level (the
power source voltage should be between 4.0 V and 5.5 V, and XIN
oscillation is stable), reset is released.
Make sure that the reset input voltage is 0.5 V or less for 4.0 V of
VCC.
Fig. 10. Reset circuit example
(Note)
0.2VCC
0V
Poweron
VCC
RESET
Note. Reset release voltage:VCC = 4.0 V
CLOCK GENERATING CIRCUIT
Oscillating circuit is built up by connecting pins XIN and XOUT as short
as possible and connecting a capacitor between pins XIN (XOUT) and
VSS.
When supplying a clock externally, input it to XIN pin and leave XOUT
pin open.
COSC
XIN
XOUT
XIN
XOUT
VCC
VSS
External oscillation
circuit
Open
Fig. 11. RC generating circuit
Fig. 12. External clock input circuit
HANDLING OF UNUSED PINS
Handle unused pins as the follow.
Pin
Segment
Digit
Analog input
Handling
Open
Connect to VCC or VSS through a resistor.
Table. 2. Handling of unused pins
相关PDF资料
PDF描述
M35500AFP FLUORESCENT DSPL CTRL, PQFP44
M37150M8-XXXFP 8-BIT, MROM, 8.95 MHz, MICROCONTROLLER, PDSO42
M37150MF-XXXFP 8-BIT, MROM, 8.95 MHz, MICROCONTROLLER, PDSO42
M37150EFFP 8-BIT, OTPROM, 8.95 MHz, MICROCONTROLLER, PDSO42
M37151M6-XXXFP 8-BIT, MROM, 8.1 MHz, MICROCONTROLLER, PDSO42
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