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参数资料
| 型号： | M366S1623ET0 |
| 厂商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 16Mx64 SDRAM DIMM based on 8Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD |
| 中文描述： | 16Mx64 SDRAM的内存在8Mx8，4Banks，4K的刷新，3.3社民党基于同步DRAM |
| 文件页数： | 11/12页 |
| 文件大小： | 126K |
| 代理商： | M366S1623ET0 |
PC133 Unbuffered DIMM
M366S1623ET0
REV. 0.0 Dec, 2000
M366S1623ET0-C75(Intel SPD 1.2B ver. base)
Byte #
Function Described
Function Supported
Hex value
Note
-75
-75
0
# of bytes written into serial memory at module manufacturer
128bytes
80h
1
Total # of bytes of SPD memory device
256bytes (2K-bit)
08h
2
Fundamental memory type
SDRAM
04h
3
# of row address on this assembly
12
0Ch
1
4
# of column address on this assembly
9
09h
1
5
# of module
rows
on this assembly
2
rows
02h
6
Data width of this assembly
64 bits
40h
7
...... Data width of this assembly
-
00h
8
Voltage interface standard of this assembly
LVTTL
01h
9
SDRAM cycle time @CAS latency of 3
7.5ns
75h
2
10
SDRAM access time from clock @CAS latency of 3
5.4ns
54h
2
11
DIMM configuraion type
Non parity
00h
12
Refresh rate & type
15.625us, support self refresh
80h
13
Primary SDRAM width
x8
08h
14
Error checking SDRAM width
None
00h
15
Minimum clock delay for back-to-back random column address
t
CCD
= 1CLK
01h
16
SDRAM device attributes : Burst lengths supported
1, 2, 4, 8 & full page
8Fh
17
SDRAM device attributes : # of
banks
on SDRAM device
SDRAM device attributes : CAS latency
4
banks
3
04h
18
04h
19
SDRAM device attributes : CS latency
0 CLK
01h
20
SDRAM device attributes : Write latency
0 CLK
01h
21
SDRAM module attributes
Non-buffered, non-registered
& redundant addressing
00h
22
SDRAM device attributes : General
+/- 10% voltage tolerance,
Burst Read Single bit Write
precharge all, auto precharge
0Eh
23
SDRAM cycle time @CAS latency of 2
-
00h
2
24
SDRAM access time from clock@CAS latency of 2
-
00h
2
25
SDRAM cycle time @CAS latency of 1
-
00h
26
SDRAM access time from clock@CAS latency of 1
-
00h
27
Minimum row precharge time (=t
RP
)
20ns
14h
28
Minimum row active to row active delay (t
RRD
)
15ns
0Fh
29
Minimum RAS to CAS delay (=t
RCD
)
20ns
14h
30
Minimum activate precharge time (=t
RAS
)
45ns
2Dh
31
Module
row
density
Command and address signal input setup time
2
rows
of 64MB
1.5ns
10h
32
15h
33
Command and address signal input hold time
0.8ns
08h
34
Data signal input setup time
1.5ns
15h
ü
Organization : 16Mx64
ü
Composition : 8Mx8 *16
ü
Used component part # : K4S640832E-TC75
ü
# of rows in module : 2 rows
ü
# of banks in component : 4 banks
ü
Feature : 1,375mil height & double sided component
ü
Refresh : 4K/64ms
ü
Contents ;
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M366S1654CTS | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 16Mx16, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD |
| M366S1654CTS-C1H | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 16Mx16, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD |
| M366S1654CTS-C1L | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 16Mx16, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD |
| M366S1654CTS-C7A | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 16Mx16, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD |
| M366S1654CTS-C7C | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 16Mx16, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD |
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