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参数资料
| 型号： | M366S1623ET0 |
| 厂商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 16Mx64 SDRAM DIMM based on 8Mx8, 4Banks, 4K Refresh, 3.3V Synchronous DRAMs with SPD |
| 中文描述： | 16Mx64 SDRAM的内存在8Mx8，4Banks，4K的刷新，3.3社民党基于同步DRAM |
| 文件页数： | 8/12页 |
| 文件大小： | 126K |
| 代理商： | M366S1623ET0 |
PC133 Unbuffered DIMM
M366S1623ET0
REV. 0.0 Dec, 2000
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
Notes :
REFER TO THE INDIVIDUAL COMPONENET, NOT THE WHOLE MODULE.
Parameter
Symbol
-75
Unit
Note
tCC=7.5ns
tCC=10ns
Min
Max
Min
Max
CLK cycle time
CAS latency=3
t
CC
7.5
1000
10
1000
ns
1
CLK to valid
output delay
CAS latency=3
t
SAC
-
5.4
-
6.0
ns
1,2
Output data
hold time
CAS latency=3
t
OH
3.0
3.0
ns
1,2
CLK high pulse width
t
CH
2.5
3.0
ns
3
CLK low pulse width
t
CL
2.5
3.0
ns
3
Input setup time
t
SS
1.5
2
ns
3
Input hold time
t
SH
0.8
1
ns
3
CLK to output in Low-Z
t
SLZ
1
1
ns
2
CLK to output
in Hi-Z
CAS latency=3
t
SLZ
5.4
6.0
ns
AC CHARACTERISTICS
(AC operating conditions unless otherwise noted)
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| M366S1654CTS | 制造商:SAMSUNG 制造商全称:Samsung semiconductor 功能描述:16Mx64 SDRAM DIMM based on 16Mx16, 4Banks, 8K Refresh, 3.3V Synchronous DRAMs with SPD |
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