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参数资料
| 型号： | M38199EFFS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, UVPROM, MICROCONTROLLER, CQCC100 |
| 封装： | WINDOWED, CERAMIC, LCC-100 |
| 文件页数： | 176/217页 |
| 文件大小： | 2564K |
| 代理商： | M38199EFFS |
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48
3819 Group
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
MITSUBISHI MICROCOMPUTERS
CLOCK GENERATING CIRCUIT
The 3819 group has two built-in oscillation circuits. An oscillation
circuit can be formed by connecting a resonator between XIN and
XOUT (XCIN and XCOUT). Use the circuit constants in accordance
with the resonator manufacturer's recommended values. No exter-
nal resistor is needed between XIN and XOUT since a feed-back
resistor exists on-chip. However, an external feed-back resistor is
needed between XCIN and XCOUT.
Immediately after poweron, only the XIN oscillation circuit starts
oscillation, and XCIN and XCOUT pins function as I/O ports.
Frequency Control
Middle-speed mode
The internal clock
φ is the frequency of XIN divided by 8. After re-
set, this mode is selected.
High-speed mode
The internal clock
φ is half the frequency of XIN.
Low-speed mode
The internal clock
φ is half the frequency of XCIN.
Note : If you switch the mode between middle/high-speed and low-speed,
stabilize both XIN and XCIN oscillations. The sufficient time is re-
quired for the XCIN oscillation to stabilize, especially immediately
after poweron and at returning from stop mode. When switching the
mode between middle/high-speed and low-speed, set the frequency
on condition that f(XIN) > 3f(XCIN).
Low-power dissipation mode
When stopping the main clock XIN in the low-speed mode, the low-
power dissipation operation starts. To stop the main clock, set the
bit 5 of the CPU mode register to “1”. When the main clock XIN is
restarted, set enough time for oscillation to stabilize by program-
ming.
The low-power dissipation operation 200
A or less (at f(XIN) = 32
kHz) can be realized by reducing the XCIN–XCOUT drivability. To re-
duce the XCIN–XCOUT drivability, clear the bit 3 of the CPU mode
register to “0”. At reset or when executing the STP instruction, this
bit is set to “1” and strong drivability is selected to help the oscilla-
tion to start.
Oscillation Control
Stop mode
If the STP instruction is executed, the internal clock
φ stops at an
“H” level, and XIN and XCIN oscillators stop. Timer 1 is set to “FF16”
and timer 2 is set to “0116”. Either XIN or XCIN divided by 16 is in-
put to timer 1, and the output of timer 1 is connected to timer 2.
The bits of the timer 12 mode register are cleared to “0”. Set the
timer 1 and timer 2 interrupt enable bits to disabled (“0”) before ex-
ecuting the STP instruction.
Oscillator restarts at reset or when an external interrupt is re-
ceived, but the internal clock
φ is not supplied to the CPU until
timer 1 underflows. When using an external resonator, it is neces-
sary for oscillating to stabilize.
Wait mode
If the WIT instruction is executed, the internal clock
φ stops at an
“H” level. The states of XIN and XCIN are the same as the state be-
fore executing the WIT instruction. The internal clock restarts at
reset or when an interrupt is received. Since the oscillator does
not stop, normal operation can be started immediately after the
clock is restarted.
Fig. 47 Ceramic resonator external circuit
Fig. 48 External clock input circuit
XCIN
XCOUT
CCIN
CCOUT
Rd
Rf
XIN
XOUT
CIN
COUT
XCIN
XCOUT
XIN
XOUT
Open
External oscillation
circuit or pulse
External oscillation
circuit
VCC
VSS
VCC
VSS
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