- 您现在的位置：买卖IC网 > PDF目录69016 > M38K29F8LHP 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 PDF资料下载
参数资料
| 型号： | M38K29F8LHP |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 8-BIT, FLASH, 8 MHz, MICROCONTROLLER, PQFP64 |
| 封装： | 10 X 10 MM, 0.50 MM PITCH, PLASTIC, LQFP-64 |
| 文件页数： | 2/126页 |
| 文件大小： | 2167K |
| 代理商： | M38K29F8LHP |
第1页当前第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页第117页第118页第119页第120页第121页第122页第123页第124页第125页第126页
v
38K2 Group User’s Manual
List of figures
Fig. 44 Structure of EP00 interrupt source register .............................................................. 1-39
Fig. 45 Structure of EP00 byte number register .................................................................... 1-40
Fig. 46 Structure of EP00 buffer area set register ................................................................ 1-40
Fig. 47 Structure of EP01 set register .................................................................................... 1-41
Fig. 48 Structure of EP01 control register 1 .......................................................................... 1-41
Fig. 49 Structure of EP01 control register 2 .......................................................................... 1-42
Fig. 50 Structure of EP01 control register 3 .......................................................................... 1-42
Fig. 51 Structure of EP01 interrupt source register .............................................................. 1-42
Fig. 52 Structure of EP01 byte number register 0 ................................................................ 1-43
Fig. 53 Structure of EP01 byte number register 1 ................................................................ 1-43
Fig. 54 Structure of EP01 MAX. packet size register ........................................................... 1-43
Fig. 55 Structure of EP01 buffer area set register ................................................................ 1-44
Fig. 56 Structure of EP02 set register .................................................................................... 1-45
Fig. 57 Structure of EP02 control register 1 .......................................................................... 1-45
Fig. 58 Structure of EP02 control register 2 .......................................................................... 1-46
Fig. 59 Structure of EP02 control register 3 .......................................................................... 1-46
Fig. 60 Structure of EP02 interrupt source register .............................................................. 1-46
Fig. 61 Structure of EP02 byte number register 0 ................................................................ 1-47
Fig. 62 Structure of EP02 byte number register 1 ................................................................ 1-47
Fig. 63 Structure of EP02 MAX. packet size register ........................................................... 1-47
Fig. 64 Structure of EP02 buffer area set register ................................................................ 1-48
Fig. 65 Structure of EP03 set register .................................................................................... 1-49
Fig. 66 Structure of EP03 control register 1 .......................................................................... 1-49
Fig. 67 Structure of EP03 control register 2 .......................................................................... 1-50
Fig. 68 Structure of EP03 control register 3 .......................................................................... 1-50
Fig. 69 Structure of EP03 interrupt source register .............................................................. 1-50
Fig. 70 Structure of EP03 byte number register 0 ................................................................ 1-51
Fig. 71 Structure of EP03 byte number register 1 ................................................................ 1-51
Fig. 72 Structure of EP03 MAX. packet size register ........................................................... 1-51
Fig. 73 Structure of EP03 buffer area set register ................................................................ 1-52
Fig. 74 Structure of EP10 stage register ................................................................................ 1-53
Fig. 75 Structure of EP10 control register 1 .......................................................................... 1-53
Fig. 76 Structure of EP10 control register 2 .......................................................................... 1-53
Fig. 77 Structure of EP10 control register 3 .......................................................................... 1-54
Fig. 78 Structure of EP10 interrupt source register .............................................................. 1-54
Fig. 79 Structure of EP10 byte number register .................................................................... 1-55
Fig. 80 Structure of EP10 buffer area set register ................................................................ 1-55
Fig. 81 Structure of EP11 set register .................................................................................... 1-56
Fig. 82 Structure of EP11 control register 1 .......................................................................... 1-56
Fig. 83 Structure of EP11 control register 2 .......................................................................... 1-56
Fig. 84 Structure of EP11 interrupt source register .............................................................. 1-57
Fig. 85 Structure of EP11 byte number register .................................................................... 1-57
Fig. 86 Structure of EP11 buffer area set register ................................................................ 1-57
Fig. 87 HUB functions ................................................................................................................ 1-58
Fig. 88 HUB function control circuit block diagram ............................................................... 1-59
Fig. 89 Block diagram of USB down-port peripheral circuits (D1+, D1-) ........................... 1-60
Fig. 90 Block diagram of USB down-port peripheral circuits (D2+, D2-) ........................... 1-60
Fig. 91 USB HUB interrupt control .......................................................................................... 1-61
Fig. 92 HUB related registers ................................................................................................... 1-62
Fig. 93 Structure of HUB interrupt source enable register .................................................. 1-63
Fig. 94 Structure of HUB interrupt source register ............................................................... 1-63
Fig. 95 Structure of HUB downstream port index register ................................................... 1-64
相关PDF资料 |
PDF描述 |
|---|---|
| M38K27M4-XXXHP | 8-BIT, MROM, 8 MHz, MICROCONTROLLER, PQFP64 |
| M41ST84WMQ6F | 1 TIMER(S), REAL TIME CLOCK, PDSO16 |
| M41ST85WMH6F | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41ST85WMH6TR | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
| M41ST85WMH6E | 1 TIMER(S), REAL TIME CLOCK, PDSO28 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M38K29F8LHP#U0 | 功能描述:IC 740/38K2 MCU FLASH 64-LQFP RoHS:是 类别:集成电路 (IC) >> 嵌入式 - 微控制器， 系列:740/38000 产品培训模块:CAN Basics Part-1 CAN Basics Part-2 Electromagnetic Noise Reduction Techniques Part 1 M16C Product Overview Part 1 M16C Product Overview Part 2 标准包装:1 系列:M16C™ M32C/80/87 核心处理器:M32C/80 芯体尺寸:16/32-位 速度:32MHz 连通性:EBI/EMI，I²C，IEBus，IrDA，SIO，UART/USART 外围设备:DMA，POR，PWM，WDT 输入/输出数:121 程序存储器容量:384KB（384K x 8） 程序存储器类型:闪存 EEPROM 大小:- RAM 容量:24K x 8 电压 - 电源 (Vcc/Vdd):3 V ~ 5.5 V 数据转换器:A/D 34x10b，D/A 2x8b 振荡器型:内部 工作温度:-20°C ~ 85°C 封装/外壳:144-LQFP 包装:托盘 产品目录页面:749 (CN2011-ZH PDF) 配用:R0K330879S001BE-ND - KIT DEV RSK M32C/87 |
| M38K29F8LHP#UO | 制造商:Renesas Electronics Corporation 功能描述: |
| M38K29T-ADF | 功能描述:DEV TEMPORARY TARGET BOARD FOR M RoHS:否 类别:编程器，开发系统 >> 配件 系列:- 产品培训模块:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program RoHS指令信息:IButton RoHS Compliance Plan 标准包装:1 系列:- 附件类型:USB 至 1-Wire? RJ11 适配器 适用于相关产品:1-Wire? 设备 产品目录页面:1429 (CN2011-ZH PDF) |
| M38K29T-PAC | 制造商:Renesas Electronics Corporation 功能描述:DEV SIMPLE TOOL SYSTEM PKG FOR 38000/38K - Bulk |
| M38UC-150 | 制造商:M/A-COM Technology Solutions 功能描述:MICROWAVE MIXER - Bulk |
发布紧急采购，3分钟左右您将得到回复。