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参数资料
| 型号： | M4-64/32-15JC |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 英文描述： | High Performance E 2 CMOS In-System Programmable Logic |
| 中文描述： | EE PLD, 15 ns, PQCC44 |
| 封装： | PLASTIC, LCC-44 |
| 文件页数： | 42/46页 |
| 文件大小： | 754K |
| 代理商： | M4-64/32-15JC |
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MACH 4 Family
5
FUNCTIONAL DESCRIPTION
The fundamental architecture of MACH 4 devices (Figure 1) consists of multiple, optimized PAL
blocks interconnected by a central switch matrix. The central switch matrix allows
communication between PAL blocks and routes inputs to the PAL blocks. Together, the PAL
blocks and central switch matrix allow the logic designer to create large designs in a single
device instead of having to use multiple devices.
The key to being able to make effective use of these devices lies in the interconnect schemes.
In MACH 4 architecture, the macrocells are exibly coupled to the product terms through the
logic allocator, and the I/O pins are exibly coupled to the macrocells due to the output switch
matrix. In addition, more input routing options are provided by the input switch matrix. These
resources provide the exibility needed to t designs efciently.
Notes:
1. 16 for MACH 4 devices with 1:1 macrocell-I/O cell ratio (see next page).
2. Block clocks do not go to I/O cells in M4(LV)-32/32.
3. M4(LV)-192/96 and M4(LV)-256/128 have dedicated clock pins which cannot be used as inputs and do not connect to the central
switch matrix.
I/O
Pins
Clock/Input
Pins
Central
Switch
Matrix
I/O
Pins
I/O
Pins
Dedicated
Input Pins
PAL Block
Logic
Allocator
with XOR
Output/
Buried
Macrocells
33/
34/
36
16
Clock
Generator
Logic
Array
Output
Switch
Matrix
Input
Switch
Matrix
I/O
Cells
16
8
Note 1
Note 2
Note 3
4
PAL Block
17466G-001
Figure 1. MACH 4 Block Diagram and PAL Block Structure
相关PDF资料 |
PDF描述 |
|---|---|
| M4-64/32-15VC | High Performance E 2 CMOS In-System Programmable Logic |
| M4LV-128/64-12VC | High Performance E 2 CMOS In-System Programmable Logic |
| M4LV-128/64-12VI | High Performance E 2 CMOS In-System Programmable Logic |
| M4LV-128/64-12YC | High Performance E 2 CMOS In-System Programmable Logic |
| M4LV-128/64-12YI | High Performance E 2 CMOS In-System Programmable Logic |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M4644 SL001 | 制造商:Alpha Wire Company 功能描述:CBL 20COND 22AWG SLT 1000' |
| M4644 SL002 | 制造商:Alpha Wire Company 功能描述:CBL 20COND 22AWG SLT 500' |
| M4644 SL005 | 制造商:Alpha Wire Company 功能描述:CBL 20COND 22AWG SLT 100' |
| M4644 SL199 | 制造商:Alpha Wire Company 功能描述:CBL 20COND 22AWG SLT 1000=1000' |
| M4644-SL001 | 制造商:Alpha Wire 功能描述: |
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