参数资料
型号: M41T93RMY6E
厂商: STMICROELECTRONICS
元件分类: 时钟/数据恢复及定时提取
英文描述: 1 TIMER(S), REAL TIME CLOCK, PDSO18
封装: 0.300 INCH, ROHS COMPLIANT, PLASTIC, SOP-18
文件页数: 19/49页
文件大小: 719K
代理商: M41T93RMY6E
Clock operation
M41T93
Doc ID 12615 Rev 5
Figure 13.
Crystal isolation example
Note:
The substrate pad should be tied to VSS.
3.5
Setting the alarm clock registers
Address locations 0Ah-0Eh (alarm 1) and 14h-18h (alarm 2) contain the alarm settings.
Either alarm can be configured independently to go off at a prescribed time on a specific
month, date, hour, minute, or second, or repeat every year, month, day, hour, minute, or
second. Bits RPT15–RPT11 and RPT25-RPT21 put the alarms in the repeat mode of
operation. Table6 on page27 shows the possible bit configurations.
Codes not listed in the table default to the once-per-second mode to quickly alert the user of
an incorrect alarm setting. When the clock information matches the alarm clock settings
based on the match criteria defined by RPT15–RPT11 and/or RPT25-RPT21, AF1 (alarm 1
flag) or AF2 (alarm 2 flag) is set. If A1IE (alarm 1 interrupt enable) is set, the alarm condition
activates the IRQ/FT/OUT output pin. To disable either of the alarms, write a '0' to the alarm
date registers and to the RPTx5–RPTx1 bits.
Note:
If the address pointer is allowed to increment to the flag register address, or the last address
written is “Alarm Seconds,” the address pointer will increment to the flag address, and an
alarm condition will not cause the interrupt/flag to occur until the address pointer is moved to
a different address.
The IRQ output is cleared by a READ to the flags register (0Fh) as shown in Figure 14. A
subsequent READ of the flags register is necessary to see that the value of the alarm flag
has been reset to '0.'.
The IRQ/FT/OUT pin can also be activated in the battery backup mode (see Figure 15 on
AI11814
Crystal
XI XO
VSS
Local Grounding
Plane (Layer 2)
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