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参数资料
| 型号： | M48T02-200PC1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 时钟/数据恢复及定时提取 |
| 英文描述： | 0 TIMER(S), REAL TIME CLOCK, PDIP24 |
| 封装： | 0.600 INCH, ROHS COMPLIANT, PLASTIC, DIP-24 |
| 文件页数： | 23/25页 |
| 文件大小： | 199K |
| 代理商： | M48T02-200PC1 |
M48T02, M48T12
Operation modes
2
Operation modes
As Figure 3 on page 6 shows, the static memory array and the quartz controlled clock
oscillator of the M48T02/12 are integrated on one silicon chip. The two circuits are
interconnected at the upper eight memory locations to provide user accessible
BYTEWIDE clock information in the bytes with addresses 7F8h-7FFh. The clock locations
contain the year, month, date, day, hour, minute, and second in 24-hour BCD format.
Corrections for 28, 29 (leap year - valid until 2100), 30, and 31 day months are made
automatically.
Byte 7F8h is the clock control register. This byte controls user access to the clock
information and also stores the clock calibration setting.
The eight clock bytes are not the actual clock counters themselves; they are memory
locations consisting of BiPORT READ/WRITE memory cells. The M48T02/12 includes a
clock control circuit which updates the clock bytes with current information once per second.
The information can be accessed by the user in the same manner as any other location in
the static memory array.
The M48T02/12 also has its own power-fail detect circuit. The control circuitry constantly
monitors the single 5 V supply for an out of tolerance condition. When VCC is out of
tolerance, the circuit write protects the SRAM, providing a high degree of data security in the
midst of unpredictable system operation brought on by low VCC. As VCC falls below
approximately 3 V, the control circuitry connects the battery which maintains data and clock
operation until valid power returns.
Table 2.
Operating modes
Note:
X = VIH or VIL; VSO = Battery backup switchover voltage.
2.1
Read mode
The M48T02/12 is in the READ mode whenever W (WRITE enable) is high and E (chip
enable) is low. The device architecture allows ripple-through access of data from eight of
16,384 locations in the static storage array. Thus, the unique address specified by the 11
Address Inputs defines which one of the 2,048 bytes of data is to be accessed. Valid data
will be available at the data I/O pins within address access time (tAVQV) after the last
address input signal is stable, providing that the E and G access times are also satisfied. If
the E and G access times are not met, valid data will be available after the latter of the chip
enable access time (tELQV) or output enable access time (tGLQV).
Mode
VCC
E
G
W
DQ0-DQ7
Power
Deselect
4.75 to 5.5 V
or
4.5 to 5.5 V
VIH
X
High Z
Standby
WRITE
VIL
XVIL
DIN
Active
READ
VIL
VIH
DOUT
Active
READ
VIL
VIH
High Z
Active
Deselect
VSO to
VPFD(min)
(1)
1.
See Table 11 on page 20 for details.
X
High Z
CMOS standby
Deselect
≤ VSO(1)
X
High Z
Battery backup mode
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T02-200PC1 | 制造商:STMicroelectronics 功能描述:IC SRAM TIMEKEEPER 16K |
| M48T02-200PC1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5.0V, 16 Kbit (2Kb x 8) TIMEKEEPER㈢ SRAM |
| M48T02-70PC1 | 功能描述:实时时钟 16K (2Kx8) 70ns RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 总线接口:I2C 日期格式:DW:DM:M:Y 时间格式:HH:MM:SS RTC 存储容量:64 B 电源电压-最大:5.5 V 电源电压-最小:1.8 V 最大工作温度:+ 85 C 最小工作温度: 安装风格:Through Hole 封装 / 箱体:PDIP-8 封装:Tube |
| M48T02-70PC1 | 制造商:STMicroelectronics 功能描述:IC NVRAM 10 YR BATTERY 16K 48T02 |
| M48T02-70PC1TR | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5.0V, 16 Kbit (2Kb x 8) TIMEKEEPER㈢ SRAM |
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