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参数资料
| 型号： | M48T212A-85MH6TR |
| 厂商： | 意法半导体 |
| 英文描述： | 3.3V TIMEKEEPER CONTROLLER |
| 中文描述： | 3.3计时控制器 |
| 文件页数： | 12/20页 |
| 文件大小： | 165K |
| 代理商： | M48T212A-85MH6TR |
M48T212A
12/20
TIMEKEEPER REGISTERS
The M48T212A offers 16 internal registers which
contain TIMEKEEPER, Alarm, Watchdog, Flag,
and Control data. These registers are memory lo-
cations which contain external (user accessible)
and internal copies of the data (usually referred to
as BiPORT
TM
TIMEKEEPER cells).
The external copies are independent of internal
functions except that they are updated periodically
by the simultaneous transfer of the incremented
internal copy. TIMEKEEPER and Alarm Registers
store data in BCD. Control, Watchdog and Flags
Registers store data in Binary Format.
CLOCK OPERATIONS
Reading the Clock
Updates to the TIMEKEEPER registers should be
halted before clock data is read to prevent reading
data in transition. Because the BiPORT TIME-
KEEPER cells in the RAM array are only data reg-
isters, and not the actual clock counters, updating
the registers can be halted without disturbing the
clock itself.
Updating is halted when a ’1' is written to the
READ bit, D6 in the Control Register (8h). As long
as a `1' remains in that position, updating is halted.
After a halt is issued, the registers reflect the
count; that is, the day, date, and time that were
current at the moment the halt command was is-
sued.
All of the TIMEKEEPER registers are updated si-
multaneously. A halt will not interrupt an update in
progress. Updating occurs 1 second after the
READ bit is reset to a ’0'.
Setting the Clock
Bit D7 of the Control Register (8h) is the WRITE
bit. Setting the WRITE bit to a `1', like the READ
bit, halts updates to the TIMEKEEPER registers.
The user can then load them with the correct day,
date, and time data in 24 hour BCD format (see
Table 13).
Resetting the WRITE bit to a `0' then transfers the
values of all time registers (Fh-9h, 1h) to the actual
TIMEKEEPER counters and allows normal opera-
tion to resume. After the WRITE bit is reset, the
next clock update will occur one second later.
Note:
Upon power-up following a power failure,
the READ bit will automatically be set to a `1'. This
will prevent the clock from updating the TIME-
KEEPER registers, and will allow the user to read
the exact time of the power-down event.
Resetting the READ Bit to a `0' will allow the clock
to update these registers with the current time. The
WRITE Bit will be reset to a `0' upon powerup.
Stopping and Starting the Oscillator
The oscillator may be stopped at any time. If the de-
vice is going to spend a significant amount of time
on the shelf, the oscillator can be turned off to min-
imize current drain on the battery. The STOP bit is
located at Bit D7 within the Seconds Register (9h).
Setting it to a ’1' stops the oscillator. When reset to
a ’0', the M48T212A oscillator starts within one sec-
ond.
Note:
It is not necessary to set the WRITE bit when
setting or resetting the FREQUENCY TEST bit (FT)
or the STOP bit (ST).
SETTING ALARM CLOCK REGISTERS
Address locations 6h-2h contain the alarm settings.
The alarm can be configured to go off at a pre-
scribed time on a specific month, date, hour,
minute, or second or repeat every year, month,
day, hour, minute, or second. It can also be pro-
grammed to go off while the M48T212A is in the
battery back-up to serve as a system wake-up call.
Bits RPT5-RPT1 put the alarm in the repeat mode
of operation. Table 12 shows the possible configu-
rations. Codes not listed in the table default to the
once per second mode to quickly alert the user of
an incorrect alarm setting.
When the clock information matches the alarm
clock settings based on the match criteria defined
by RPT5-RPT1, the AF (Alarm Flag) is set.
If AFE (Alarm Flag Enable) is also set, the alarm
condition activates the IRQ/FT pin. The IRQ/FT
output is cleared by a read to the Flags register as
shown in Figure 9. A subsequent read of the Flags
register will reset the Alarm Flag (D6; Register 0h).
The IRQ/FT pin can also be activated in the battery
back-up mode. The IRQ/FT will go low if an alarm
occurs and both ABE (Alarm in Battery Back-up
Mode Enable) and AFE are set. The ABE and AFE
bits are reset during power-up, therefore an alarm
generated during power-up will only set AF. The
user can read the Flag Register at system boot-up
to determine if an alarm was generated while the
M48T212A was in the deselect mode during pow-
er-up. Figure 10 illustrates the back-up mode alarm
timing.
相关PDF资料 |
PDF描述 |
|---|---|
| M48T212A-85MH6 | 3.3V TIMEKEEPER CONTROLLER |
| M48T212A-85MH1TR | 3.3V TIMEKEEPER CONTROLLER |
| M48T212A-85MH1 | 3.3V TIMEKEEPER CONTROLLER |
| M48T212Y-70MH1TR | Shielded Multiconductor Cable; Number of Conductors:4; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Conductor Material:Copper; Temperature Max:80 C RoHS Compliant: Yes |
| M48T212Y-70MH6 | Shielded Multiconductor Cable; Number of Conductors:5; Conductor Size AWG:24; No. Strands x Strand Size:7 x 32; Jacket Material:Polyvinylchloride (PVC); Leaded Process Compatible:Yes; Conductor Material:Copper; Temperature Max:80 C RoHS Compliant: Yes |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M48T212AMH | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V TIMEKEEPER CONTROLLER |
| M48T212V | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V TIMEKEEPER supervisor |
| M48T212V_07 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:3.3V TIMEKEEPER supervisor |
| M48T212V-70MH1 | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V/3.3V TIMEKEEPER[ CONTROLLER |
| M48T212V-70MH1E | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:5V/3.3V TIMEKEEPER CONTROLLER Supervisor |
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