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参数资料
| 型号： | M5-384/160-15YC |
| 厂商： | LATTICE SEMICONDUCTOR CORP |
| 元件分类： | PLD |
| 英文描述： | Fifth Generation MACH Architecture |
| 中文描述： | EE PLD, 15 ns, PQFP208 |
| 封装： | PLASTIC, QFP-208 |
| 文件页数： | 40/42页 |
| 文件大小： | 938K |
| 代理商： | M5-384/160-15YC |
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MACH 5 Family
7
Clock Line 1 Options
◆
Global clock (0, 1, 2, or 3) with positive edge clock enable
◆
Global clock (0, 1, 2, or 3) with negative edge clock enable
◆
Global clock (0, 1, 2, or 3) with positive and negative edge clock enable (biphase)
Clock Line 2 Options
◆
Global clock (0, 1, 2, or 3) with clock enable
Clock Line 3 Options
◆
Complement of clock line 2 (same clock enable)
◆
Product-term clock (if clock line 2 does not use clock enable
The set/reset generation portion of the control generator (Figure 5) creates three set/reset lines for
the PAL block. Each macrocell can choose one of these three lines or choose no set/reset at all.
All three lines can be congured for product term set/reset and two of the three lines can be
congured as sum term set/reset and one of the lines can be congured as product-term or sum-
term latch enable. While the set/reset signals are generated in the control generator, whether that
signal sets or resets a ip-op is determined within the individual macrocell. The same signal can
set one ip-op and reset another. PT2 or /PT2 can also be used as a latch enable for macrocells
congured as latches.
0
1
2
3
0
1
2
3
0
1
2
3
CLKIN
Clock Enable
N (0)
N (1)
OUT
MUX 2TO1
/CLK
F0
/CLK
CLK
CLKEN1
BIPHASE
CLKEN2
OUT
CLK0
CLK1
CLK2
CLK3
CLKIN
Clock Enable
MUX 2TO1
/CLK2
PTCLK
F0
Block
Clocks
0–3
PT (0:3)
PINCLK (0:3)
PT0
PT1
PT2
PT3
MUX 4TO1
IN (0)
IN (1)
IN (2)
IN (3)
OUT
U1
F0
F1
MUX 4TO1
IN (0)
IN (1)
IN (2)
IN (3)
OUT
U2
F0
F1
MUX 4TO1
IN (0)
IN (1)
IN (2)
IN (3)
OUT
U3
F0
F1
MUX
2TO1
MUX 2TO1
F0
20446G-004
Figure 4. Clock Generator
SET2/RST2/LE
Block
Sets/Reset
0–2, LE
PT (0:2)
PT0
PT1
PT2
SET1/RST1
SET0/RST0
MUX 2TO1
OUT
F0
PT1
/PT1(ST)
MUX 2TO1
OUT
F0
PT2
/PT2
20446G-005
Figure 5. Set/Reset Generator
相关PDF资料 |
PDF描述 |
|---|---|
| M5-384/160-15YI | Fifth Generation MACH Architecture |
| M5-384/160-20YI | Fifth Generation MACH Architecture |
| M5-384/160-6YC | Fifth Generation MACH Architecture |
| M5-384/160-7YC | Fifth Generation MACH Architecture |
| M5-384/160-7YI | Fifth Generation MACH Architecture |
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