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参数资料
| 型号： | M69AW024BE |
| 厂商： | 意法半导体 |
| 英文描述： | 16 Mbit (1M x16) 3V Asynchronous PSRAM |
| 中文描述： | 16兆位（1米× 16）3V的异步移动存储芯片 |
| 文件页数： | 16/25页 |
| 文件大小： | 147K |
| 代理商： | M69AW024BE |
M69AW024BE
16/25
Table 8. Write Mode AC Characteristics
Note: 1. The maximum value of this timing is applicable if E1 is kept Low without any address change. If needed by system operation, please
contact your local ST representative for relaxation of the 1000ns limitation.
2. Minimum value must be equal to or greater than the sum of the write pulse (
t
ELEH,
t
WLBH
or
t
BLBH
and the write recovery time
t
WHAV
.
3. Write pulse is defined from the falling edge of E1, W, or LB/UB, whichever occurs last.
4. Applicable to Byte Masking only. Byte Masking set-up time is defined from the falling edge of E1 or W whichever occurs last.
5. Applicable to Byte Masking only. Byte Masking hold time is defined from the rising edge of E1 or W whichever occurs first.
6. Write recovery is defined from the rising edge of E1, W, or LB/UB, whichever occurs first.
7. If G is Low after t
GHEL
(min), the read cycle is initiated. In other words, G must be brought High within t
GHEL
(min) after E1 is brought
Low. Once the read cycle is initiated, new write pulse should be input after t
AVAX
or t
ELEH
minimum value.
8. If G is Low after new address input, the read cycle is initiated. In other words, G must be brought High at the same time or before
new address valid. Once the read cycle is initiated, new write pulse should be input after t
AVAX
or t
ELEH
minimum value.
Symbol
Alt.
Parameter
M69AW024BE
Unit
–60
Min
Max
t
AVAX,
t
ELAX(1,2)
t
WC
Chip Enable Write Cycle Time
70
1000
ns
t
AVEL
, t
AVBL
,
t
AVWL(2)
t
AS
Address Set-up Time to Chip Enable Low
0
ns
t
ELEH(3)
t
CW
Chip Enable Write Pulse Width
45
ns
t
WLBH
,
t
WLWH(3)
t
WP
Write Enable Write Pulse Width
45
ns
t
BLWH
,
t
BLBH(3)
t
BW
LB, UB Pulse (Write Operation)
45
ns
t
BHWL(4)
t
BS
LB, UB Byte Masking Set-up Time
–5
ns
t
WHBL(5)
t
BH
LB, UB Hold Time
–5
ns
t
WHAX,
t
EHAX
,
t
BHAX(6)
t
WR
Write Recovery Time
0
ns
t
EHEL
t
CP
Chip Enable High Pulse
10
ns
t
WHWL
t
WHP
Write Enable High Pulse
10
1000
ns
t
BHBL
t
BHP
LB, UB High Pulse
10
1000
ns
t
DVEH
, t
DVWH
,
t
DVBH
t
DS
Data Set-up Time
15
ns
t
EHDZ
, t
WHDZ
,
t
BHDZ
, t
GHDZ
t
DH
Data Hold Time
0
ns
t
GHEL(7)
t
OHCL
Output Enable High to Chip Enable Low Set-up Time
–5
ns
t
GHAV(8)
t
OES
Output Enable Set-up Time
0
ns
t
BLBH2
t
BWO
LB, UB Low to LB, UB High for Page Access
30
ns
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M69AW024BE60ZB1F | 制造商:Micron Technology Inc 功能描述:16MB 3V WIRELESS NOR DEVICE - Tape and Reel |
| M69AW024BE60ZB8F | 功能描述:静态随机存取存储器 16 Mbit 1M x16 3V Async P静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| M69AW024BL60ZB8T | 功能描述:静态随机存取存储器 16 MBIT (1M X16) 3V Asynch 静态随机存取存储器 RoHS:否 制造商:Cypress Semiconductor 存储容量:16 Mbit 组织:1 M x 16 访问时间:55 ns 电源电压-最大:3.6 V 电源电压-最小:2.2 V 最大工作电流:22 uA 最大工作温度:+ 85 C 最小工作温度:- 40 C 安装风格:SMD/SMT 封装 / 箱体:TSOP-48 封装:Tray |
| M69AW024BL70ZB8T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:16 Mbit (1M x16) 3V Asynchronous PSRAM |
| M69AW048B | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:32 Mbit (2M x16) 3V Asynchronous PSRAM |
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