参数资料
型号: M7010R-083ZA1T
厂商: 意法半导体
英文描述: 16K x 68-bit Entry NETWORK SEARCH ENGINE
中文描述: 16K的× 68位进入网络搜索引擎
文件页数: 56/67页
文件大小: 449K
代理商: M7010R-083ZA1T
M7010R
56/67
ARBITRATION
Figure 41, page 56 shows an example of the arbi-
tration cycle for determining which device drives
the SRAM Bus in a single block, up to eight
M7010Rs with 136-bit configuration settings.
Four cycles from the SEARCH command, all
M7010Rs are informed of the SEARCH result
within the device and drive their LHO signals. At
the next cycle, all downstream devices know the
outcome of the SEARCH in all the upstream devic-
es.
If any of the upstream devices has a hit, all the
subsequent devices defer driving the SRAM Bus.
If a SEARCH failure occurs, the M7010R with the
LRAM Bit set (the last in the chain) drives the
SRAM Bus signals. The device with LDEV set to
'1' is the default driver
of the
SSV and SSF sig-
nals. Figure 42, page 57 shows how an M7010R
arbitrates accesses to the SRAM.
Figure 41. Timing Diagram for Arbitration Within a Block
Cycle 1
Cycle 2
Cycle 3
Cycle 4
Cycle 5
Cycle 7
Cycle 6
Cycle 8
Cycle 10
Cycle 9
CLK2X
CMDV
CMD[1:0]
ALE_L, CE_L
WE_L
OE_L
SADR[21:0]
CMD[8:2]
PHS_L
AI04293
A
B
DQ
A1
A2
TLSZ = 00, LRAM = 0, LDEV = 0
Learn1
Learn2
Comp1
1A 1B
Comp2
X
X
X
X
X
X
X
X
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