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| 型号： | M72DW64000B |
| 厂商： | 意法半导体 |
| 英文描述： | 64Mbit (x8/ x16, Multiple Bank, Boot Block) Flash Memory and 16Mbit Pseudo SRAM, 3V Supply, Multiple Memory Product |
| 中文描述： | 64兆比特（x8 / x16插槽，多银行，引导块）和16Mbit的闪存伪静态存储器，3V电源，多记忆体产品 |
| 文件页数： | 14/19页 |
| 文件大小： | 102K |
| 代理商： | M72DW64000B |
M72DW64000B
14/19
Table 7. PSRAM DC Characteristics
Note: 1. Average AC current, Outputs open, cycling at t
AVAX
(min).
2. Maximum DC voltage on input and I/O pins is V
DDP
+ 0.3V.
During voltage transitions, input may positive overshoot to V
DDP
+ 1.0V for a period of up to 5ns.
3. Minimum DC voltage on input or I/O pins is –0.3V.
During voltage transitions, input may positive overshoot to V
SS
+ 1.0V for a period of up to 5ns.
Symbol
Parameter
Test Condition
Min
Max
Unit
I
DD1 (1)
Operating Supply
Current
V
DDP
= 3.3V,
V
IN
= V
IH
or V
IL
,
E1
P
=
V
IL
, E2
P
=
V
IH
, I
OUT
= 0mA
t
RC
/t
WC
=
Min
20
mA
t
RC
/t
WC
=
1μs
3.0
mA
I
LI
Input Leakage
Current
0V
≤
V
IN
≤
V
DDP
–1
1
μA
I
LO
Output Leakage
Current
0V
≤
V
OUT
≤
V
DDP
–1
1
μA
I
PD
Deep Power Down
Current
V
DDP
= 3.3V,
V
IN
=
V
IH
or V
IL
,
E2
P
≤
0.2V
10
μA
I
SB
Standby Supply
Current CMOS
3.1V
≤
V
DDP
≤
3.3V,
V
IN
= V
IH
or V
IL
,
E1
P
=
V
IH
and E2
P
=
V
IH
, I
OUT
= 0mA
1.5
mA
2.7V
≤
V
DDP
≤
3.1V,
V
IN
= V
IH
or V
IL
,
E1
P
=
V
IH
and E2
P
=
V
IH
, I
OUT
= 0mA
1
mA
3.1V
≤
V
DDP
≤
3.3V,
V
IN
≤
0.2V or
≥
V
DDP
–0.2V,
E1
P
≥
V
DDP
–0.2V and
E2
P
≥
V
DDP
–0.2V), I
OUT
= 0mA
100
μA
2.7V
≤
V
DDP
≤
3.1V,
V
IN
≤
0.2V or
≥
V
DDP
–0.2V,
E1
P
≥
V
DDP
–0.2V and
E2
P
≥
V
CC
–0.2V), I
OUT
= 0mA
70
μA
V
IH (2)
Input High Voltage
3.1V
≤
V
DDP
≤
3.3V
2.6
V
CC
+ 0.3
V
2.7V
≤
V
DDP
≤
3.1V
2.2
V
CC
+ 0.3
V
V
IL (3)
Input Low Voltage
3.1V
≤
V
DDP
≤
3.3V
–0.3
0.6
V
2.7V
≤
V
DDP
≤
3.1V
–0.3
0.5
V
V
OH
Output High Voltage
3.1V
≤
V
DDP
≤
3.3V, I
OH
= –0.5mA
2.5
V
2.7V
≤
V
DDP
≤
3.1V, I
OH
= –0.5mA
2.2
V
V
OL
Output Low Voltage
V
DDP
= 3V, I
OL
= 1mA
0.4
V
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