参数资料
型号: M8803F3W-15K1
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52
封装: PLASTIC, LCC-52
文件页数: 3/85页
文件大小: 601K
代理商: M8803F3W-15K1
11/85
M88 FAMILY
Table 9. Register Address Offset
Note: 1. Other registers that are not part of the I/O ports.
Register Name
Port A
Port B
Port C
Port D
Other1
Description
Data In
00
01
10
11
Reads Port pin as input, MCU I/O input mode
Control
02
03
Selects mode between MCU I/O or Address Out
Data Out
0405
1213
Stores data for output to Port pins, MCU I/O output
mode
Direction
06
07
14
15
Configures Port pin as input or output
Drive Select
08
09
16
17
Configures Port pins as either CMOS or Open
Drain on some pins, while selecting high slew rate
on other pins.
Input Macrocell
0A
0B
18
Reads Input Macrocells
Enable Out
0C
0D
1A
1B
Reads the status of the output enable to the I/O
Port driver
Output Macrocells
AB
20
Read – reads output of Macrocells AB
Write – loads Micro
cell Flip-Flops
Output Macrocells
BC
21
Read – reads output of Macrocells BC
Write – loads Micro
cell Flip-Flops
Mask Macrocells
AB
22
Blocks writing to the Output Macrocells AB
Mask Macrocells
BC
23
Blocks writing to the Output Macrocells BC
Flash Protection
C0
Read only – Flash Sector Protection
PSD/EE Protection
C2
Read only – PSD Security and EEPROM/Flash
Boot Sector Protection
JTAG Enable
C7
Enables JTAG Port
PMMR0
B0
Power Management Register 0
PMMR2
B4
Power Management Register 2
Page
E0
Page Register
VM
E2
Places PSD memory areas in Program and/or
Data space on an individual basis.
programmer or to PSD Simulator for device-level
simulation.
PSDsoft offers direct support for two ST device
programmers, PSDpro, and FlashLink (JTAG).
PSDsoft makes available two types of files to
support third party programmers. First, the *.obj
file is in Intel hex format, and is compatible with
conventional device programmers. Second, the
*.svf file is a serial vector format file for JTAG-ISC
device programmers.
PIN DESCRIPTION
Table 7 describes the pin names and pin functions
of the M88x3Fxx FLASH+PSD. Pins that have
multiple names and/or functions are defined using
PSD Configuration.
M88X3FXX FLASH+PSD REGISTER
DESCRIPTION AND ADDRESS OFFSET
Table 9 shows the offset addresses to the
M88x3Fxx FLASH+PSD registers relative to the
CSIOP base address. The CSIOP space is the
256 bytes of address that is allocated by the user
to the internal M88x3Fxx FLASH+PSD registers.
Table 9 provides brief descriptions of the registers
相关PDF资料
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