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参数资料
| 型号： | M8803F3W-15K1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| 封装： | PLASTIC, LCC-52 |
| 文件页数： | 5/85页 |
| 文件大小： | 601K |
| 代理商： | M8803F3W-15K1 |
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13/85
M88 FAMILY
would read a ROM device. However, Flash
memory can only be erased and programmed with
specific
instructions.
For
example,
the
microcontroller cannot write a single byte directly
to Flash memory as one would write a byte to
RAM. To program a byte into Flash memory, the
microcontroller
must
execute
a
program
instruction sequence, then test the status of the
programming event. This status test is achieved
by a read operation or polling the Ready/Busy pin
(PC3).
The Flash memory can also be read by using
special instructions to retrieve particular Flash
device information (sector protect status and ID).
The EEPROM is a bit different. Data can be written
to EEPROM memory using write operations, like
writing to a RAM device, but the status of each
write
event
must
be
checked
by
the
microcontroller. A write event can be one to 64
contiguous bytes. The status test is very similar to
that used for Flash memory (read operation or
Ready/Busy). Optionally, the EEPROM memory
may be put into a Software Data Protect (SDP)
mode where it requires instructions, rather than
operations, to alter its contents. SDP mode makes
writing to EEPROM much like writing to Flash
memory.
Instructions
An instruction is defined as a sequence of specific
operations. Each received byte is sequentially
decoded by the PSD and not executed as a
standard
write
operation.
The instruction
is
executed when the correct number of bytes are
properly received and the time between two
consecutive bytes is shorter than the time-out
value. Some instructions are structured to include
read operations after the initial write operations.
The sequencing of any instruction must be
followed exactly. Any invalid combination of
instruction
bytes
or
time-out
between
two
consecutive bytes while addressing Flash memory
will reset the device logic into a read array mode
(Flash memory reads like a ROM device). An
invalid combination or time-out while addressing
the EEPROM block will cause the offending byte
to be interpreted as a single operation.
The
M88x3Fxx FLASH+PSD supports these
instructions (see Table 11):
Flash memory:
t Erase memory by chip or sector
t Suspend or resume sector erase
t Program a byte
t Reset to read array mode
t Read Flash Identifier value
t Read sector protection status
Optional EEPROM:
t Write data to OTP Row
t Read data from OTP Row
t Power down memory
t Enable Software Data Protect (SDP)
t Disable SDP
t Return from read OTP Row read mode or power
down mode.
These instructions are detailed in Table 11. For
efficient decoding of the instructions, the first two
bytes of an instruction are the coded cycles and
are followed by a command byte or confirmation
byte. The coded cycles consist of writing the data
AAh to address X555h during the first cycle and
data 55h to address XAAAh during the second
cycle. Address lines A15-A12 are don’t cares
during the instruction write cycles. However, the
appropriate sector select signal (FSi, EESi, or
CSBOOTi) must be selected.
Power Down Instruction and Power Up
Condition
EEPROM Power Down Instruction (M8813F1x
only)
The EEPROM can enter power down mode with
the help of the EEPROM power down instruction
(see Table 11). Once the EEPROM power down
instruction is decoded, the EEPROM memory
cannot be accessed unless a Return instruction
(also in Table 11) is decoded. Alternately, this
power down mode will automatically occur when
the APD circuit is triggered (see the section
entitled “Automatic Power Down (APD) Unit and
Power Down Mode”, on page 48). Therefore, this
instruction is not required if the APD circuit is used.
Power-Up Condition
The M88x3Fxx FLASH+PSD internal logic is reset
upon power-up to the read array mode. Any write
operation to the EEPROM is inhibited during the
first 5 ms following power-up. The FSi and EESi/
CSBOOTi select signals, along with the write
strobe signal, must be in the false state during
power-up for maximum security of the data
contents and to remove the possibility of a byte
being written on the first edge of a write strobe
signal. Any write cycle initiation is locked when
VCC is below VLKO.
Read
Under typical conditions, the microcontroller may
read the Flash, EEPROM, or Flash Boot memories
using read operations just as it would a ROM or
RAM device. Alternately, the microcontroller may
use read operations to obtain status information
about a program or erase operation in progress.
Lastly, the microcontroller may use instructions to
read special data from these memories. The
following sections describe these read functions.
相关PDF资料 |
PDF描述 |
|---|---|
| M8803F2W-15T1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| M8813F3W-15K1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| M8813F3Y-90K1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| M8813F3Y-90T1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| M8803F3Y-90K1T | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M8805/100-007 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-007 |
| M8805/100-009 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-009 |
| M8805/100-010 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-010 |
| M8805/100-015 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-015 |
| M8805/100-016 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-016 |
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