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参数资料
| 型号： | M8803F3Y-90T1T |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| 封装： | PLASTIC, QFP-52 |
| 文件页数： | 7/85页 |
| 文件大小： | 601K |
| 代理商： | M8803F3Y-90T1T |
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15/85
M88 FAMILY
Read the Contents of Memory
Main Flash and Flash Boot memories are placed
in the read array mode after power-up, chip reset,
or a Reset Flash instruction (see Table 11). The
microcontroller can read the memory contents of
main Flash, optional EEPROM, or optional Flash
Boot by using read operations any time the read
operation is not part of an instruction sequence.
Read the Main Flash Memory Identifier
The main Flash memory identifier is read with an
instruction composed of 4 operations: 3 specific
write operations and a read operation (see Table
11). During the read operation, address bits A6,
A1, and A0 must be 0,0,1, respectively, and the
appropriate sector select signal (FSi) must be
active. See the section entitled “Read the Main
Flash
Memory Identifier”, on
page
15,
for
information on how to use the Flash Memory
Identifier.
Read the Main Flash Memory Sector Protection
Status
The main Flash memory sector protection status is
read with an instruction composed of 4 operations:
3 specific write operations and a read operation
(see Table 11). During the read operation, address
bits A6, A1, and A0 must be 0,1,0, respectively,
while the chip select FSi designates the Flash
sector whose protection has to be verified. The
read operation will produce 01h if the Flash sector
is protected, or 00h if the sector is not protected.
The sector protection status for all NVM blocks
(main Flash, EEPROM, or Boot Flash) can be read
by
the
microcontroller
accessing the
Flash
Protection and PSD/EE Protection registers in
PSD I/O space. See the section entitled “Flash
and EEPROM Sector Protect”, on page 20, for
register definitions.
Read the OTP Row (M8813F1x only)
There are 64 bytes of One-Time-Programmable
(OTP) memory that reside in EEPROM. These 64
bytes are in addition to the 32 KBytes of EEPROM
memory. A read of the OTP row is done with an
instruction composed of at least 4 operations: 3
specific write operations and one to 64 read
operations (see Table 11). During the read
operation(s), address bit A6 must be zero, while
address bits A5-A0 define the OTP Row byte to be
read while any EEPROM sector select signal
(EESi) is active. After reading the last byte, an
EEPROM Return instruction must be executed
(see Table 11).
Read the Erase/Program Status Bits
The M88x3Fxx FLASH+PSD provides several
status bits to be used by the microcontroller to
confirm
the
completion
of
an
erase
or
programming instruction of Flash memory. Bits are
also available to show the status of writes to
EEPROM. These status bits minimize the time that
the microcontroller spends performing these tasks
and are defined in Table 12. The status bits can be
read as many times as needed.
For
Flash memory,
the
microcontroller can
perform a read operation to obtain these status
bits while an erase or program instruction is being
executed by the embedded algorithm. See the
section entitled “Programming Flash Memory”, on
page 18, for details.
For
EEPROM
not
in
SDP
mode,
the
microcontroller can perform a read operation to
obtain these status bits just after a data write
operation. The microcontroller may write one to 64
bytes before reading the status bits. See the
section entitled “Writing to the Optional EEPROM
(M8813F1x only)”, on page 16.
For EEPROM in SDP mode, the microcontroller
will perform a read operation to obtain these status
bits while an SDP write instruction is being
executed by the embedded algorithm. See the
section entitled “Instructions”, on page 13, for
details.
Data Polling Flag DQ7
When Erasing or Programming the Flash memory
(or when Writing into the EEPROM memory), bit
DQ7 outputs the complement of the bit being
entered for Programming/Writing on DQ7. Once
the Program instruction or the Write operation is
completed, the true logic value is read on DQ7 (in
Table 12. Status Bit
Note: 1. X = Not guaranteed value, can be read either 1 or 0.
2. DQ7-DQ0 represent the Data Bus bits, D7-D0.
3. FSi/CSBO OTi and EESi are active high.
FSi/CSBOOTi
EESi
DQ7
DQ6
DQ5
DQ4
DQ3
DQ2
DQ1
DQ0
Flash
VIH
VIL
Data
Polling
Toggle
Flag
Error
Flag
X
Erase
Time-
out
XXX
EEPROM
VIL
VIH
Data
Polling
Toggle
Flag
XXXXXX
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PDF描述 |
|---|---|
| M8803F2W-15T1T | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
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| M8813F3W-15T1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| M8803F2Y-90T1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| M8803F3Y-90T1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M8805/100-007 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-007 |
| M8805/100-009 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-009 |
| M8805/100-010 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-010 |
| M8805/100-015 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-015 |
| M8805/100-016 | 制造商:OTTO Engineering Inc 功能描述:M8805/100-016 |
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