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参数资料
| 型号： | M8813F2W-15K1 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 128K X 8 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
| 封装： | PLASTIC, LCC-52 |
| 文件页数： | 11/85页 |
| 文件大小： | 601K |
| 代理商： | M8813F2W-15K1 |
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19/85
M88 FAMILY
Figu re 8. Data Toggl e Flowchart
READ
DQ5 & DQ6
START
READ DQ6
FAIL
PASS
AI01370B
DQ6
=
TOGGLE
NO
YES
DQ5
=1
NO
YES
DQ6
=
TOGGLE
Figu re 7. Data Polling Flowchart
READ DQ5 & DQ7
at VALID ADDRESS
START
READ DQ7
FAIL
PASS
AI01369B
DQ7
=
DATA
YES
NO
YES
NO
DQ5
=1
DQ7
=
DATA
YES
NO
PSDsoft will generate ANSI C code functions
which implement these Data Polling algorithms.
Data Toggle
Checking the Data Toggle bit on DQ6 is a method
of determining whether a Program or Erase
instruction is in progress or has completed. Figure
8 shows the Data Toggle algorithm.
When the MCU issues a programming instruction,
the embedded algorithm within the M88x3Fxx
FLASH+PSD begins. The MCU then reads the
location of the byte to be programmed in Flash to
check status. Data bit DQ6 of this location will
toggle each time the MCU reads this location until
the embedded algorithm is complete. The MCU
continues to read this location, checking DQ6 and
monitoring the Error bit on DQ5. When DQ6 stops
toggling (two consecutive reads yield the same
value), and the Error bit on DQ5 remains ‘0’, then
the embedded algorithm is complete. If the Error
bit on DQ5 is ‘1’, the MCU should test DQ6 again,
since DQ6 may have changed simultaneously with
DQ5 (see Figure 8).
The Error bit at DQ5 will be set if either an internal
time-out occurred while the embedded algorithm
attempted to program the byte, or if the MCU
attempted to program a ‘1’ to a bit that was not
erased (not erased is logic ‘0’).
It is suggested (as with all Flash memories) to read
the
location
again
after
the
embedded
programming
algorithm
has
completed
to
compare the byte that was written to Flash with the
byte that was intended to be written.
When using the Data Toggle method after an
erase instruction, Figure 8 still applies. DQ6 will
toggle until the erase operation is complete. A ‘1’
on DQ5 will indicate a time-out failure of the erase
operation, a ‘0’ indicates no error. The MCU can
read any location within the sector being erased to
get DQ6 and DQ5.
PSDsoft will generate ANSI C code functions
which implement these Data Toggling algorithms.
Erasing Flash Memory
Flash Bulk Erase Instruction
The Flash Bulk Erase instruction uses six write
operations followed by a Read operation of the
status register, as described in Table 11. If any
byte of the Bulk Erase instruction is wrong, the
Bulk Erase instruction aborts and the device is
reset to the Read Flash memory status.
During a Bulk Erase, the memory status may be
checked by reading status bits DQ5, DQ6, and
DQ7,
as
detailed
in
the
section
entitled
“Programming Flash Memory”, on page 18. The
相关PDF资料 |
PDF描述 |
|---|---|
| M8813F3W-15T1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| M8803F2Y-90T1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| M8803F3Y-90T1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| M8803F2Y-90T1T | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQFP52 |
| M8803F3W-15K1 | 1M X 1 FLASH, 27 I/O, PIA-GENERAL PURPOSE, PQCC52 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| M8813F2Y | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:In-System Programmable ISP Multiple-Memory and Logic FLASHPSD Systems with CPLD for MCUs |
| M8813F2Y-90K6 | 制造商:STMicroelectronics 功能描述: |
| M88141W-15K1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:In-System Programmable ISP Multiple-Memory and Logic FLASHPSD Systems with CPLD for MCUs |
| M88141W-15K6T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:In-System Programmable ISP Multiple-Memory and Logic FLASHPSD Systems with CPLD for MCUs |
| M88141W-15T1T | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:In-System Programmable ISP Multiple-Memory and Logic FLASHPSD Systems with CPLD for MCUs |
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