参数资料
型号: M88
厂商: 意法半导体
英文描述: In-System Programmable ISP Multiple-Memory and Logic FLASHPSD Systems with CPLD for MCUs
中文描述: 在系统可编程ISP的多内存和CPLD的逻辑FLASHPSD系统的微控制器
文件页数: 2/7页
文件大小: 67K
代理商: M88
M88 FAMILY
2/7
Figure 2A. PLCC Connections
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P
P
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AD15
AD14
AD13
AD12
AD11
AD10
AD9
AD8
VCC
AD7
AD6
AD5
AD4
PD2
PD1
PD0
PC7
PC6
PC5
PC4
VCC
GND
PC3
PC2
PC1
PC0
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AI02857
Figure 2B. PQFP Connections
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AD15
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AD14
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AD13
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AD12
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AD11
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AD10
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AD9
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AD8
31 V
CC
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AD5
27 AD4
PD2
PD1
PD0
PC7
PC6
PC5
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CC
GND
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PC0
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AI02858
Table 2. Product Range
1
Note: 1. All products support: JTAG serial ISP, MCU parallel ISP, ISP Flash memory, ISP CPLD, Security features, Power Management
Unit (PMU), Automatic Power-down (APD)
2. SRAM may be backed up using an external battery.
Part Number
Primary Flash
Memory
Secondary NVM
SRAM
2
I/O Ports Voltage Range
Access Time
M8813F1Y
1 Mbit
256 Kbit EEPROM
16 Kbit
27
4.5-5.5 V
90 ns or
150 ns
M8813F2Y
1 Mbit
256 Kbit Flash memory
16 Kbit
27
M8834F2Y
2 Mbit
256 Kbit Flash memory
64 Kbit
27
M8813F1W
1 Mbit
256 Kbit EEPROM
16 Kbit
27
2.7-3.6 V
150 ns
M8813F2W
1 Mbit
256 Kbit Flash memory
16 Kbit
27
M8834F2W
2 Mbit
256 Kbit Flash memory
64 Kbit
27
Programmability (ISP) to Flash memory and
programmable logic. The result is a simple and
flexible
solution
for
FLASH+PSD devices combine many of the
peripheral
functions
found
applications. FLASH+PSD provides a glueless
interface
to
most
commonly-used
MCUs.
Table 2 summarizes all the devices in the M88
Family.
The CPLD in the FLASH+PSD devices features
an optimized Macrocell logic architecture. The
Macrocell was created to address the unique
requirements of embedded system designs. It
allows direct connection between the system
address/data bus, and the internal FLASH+PSD
embedded
designs.
in
MCU
based
ROMless
registers, to simplify communication between the
MCU and other supporting devices.
The FLASH+PSD device includes a JTAG Serial
Programming
interface,
Programming (ISP) of the entire device. This
feature reduces development time, simplifies the
manufacturing flow, and dramatically lowers the
cost of field upgrades. Using ST’s special Fast-
JTAG programming, a design can be rapidly
programmed into the FLASH+PSD.
The innovative FLASH+PSD family solves key
problems faced by designers when managing
discrete Flash memory devices, such as:
– Complex address decoding
– In-System (first-time) Programming (ISP)
– Concurrent
EEPROM
programming (IAP).
to
allow
In-System
or
Flash
memory
相关PDF资料
PDF描述
M89 In-System Programmable ISP Multiple-Memory and Logic FLASHPSD Systems for MCUs
M93C-86WDS3T 16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROM
M93C-46BN6 16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROM
M93C-46BN6TP 16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROM
M93C-46BN7P 16Kbit, 8Kbit, 4Kbit, 2Kbit and 1Kbit (8-bit or 16-bit wide) MICROWIRE Serial Access EEPROM
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