参数资料
型号: M95320-WDW6TG
厂商: NUMONYX
元件分类: PROM
英文描述: 4K X 8 FLASH 2.7V PROM, PDSO8
封装: 0.169 INCH, ROHS COMPLIANT, TSSOP-8
文件页数: 14/45页
文件大小: 440K
代理商: M95320-WDW6TG
M95320, M95640, M95320-x, M95640-x
Instructions
6.5
Read from Memory Array (READ)
As shown in Figure 11, to send this instruction to the device, Chip Select (S) is first driven
Low. The bits of the instruction byte and address bytes are then shifted in, on Serial Data
Input (D). The address is loaded into an internal address register, and the byte of data at
that address is shifted out, on Serial Data Output (Q).
If Chip Select (S) continues to be driven Low, the internal address register is automatically
incremented, and the byte of data at the new address is shifted out.
When the highest address is reached, the address counter rolls over to zero, allowing the
Read cycle to be continued indefinitely. The whole memory can, therefore, be read with a
single READ instruction.
The Read cycle is terminated by driving Chip Select (S) High. The rising edge of the Chip
Select (S) signal can occur at any time during the cycle.
The first byte addressed can be any byte within any page.
The instruction is not accepted, and is not executed, if a Write cycle is currently in progress.
Figure 11.
Read from Memory Array (READ) sequence
1.
Depending on the memory size, as shown in Table 6, the most significant address bits are Don’t Care.
C
D
AI01793D
S
Q
15
2
1
3456789 10
20 21 22 23 24 25 26 27
14 13
3210
28 29 30
76543
1
7
0
High Impedance
Data Out 1
Instruction
16-Bit Address
0
MSB
2
31
Data Out 2
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