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参数资料
| 型号： | M95320-WDW6TG |
| 厂商： | NUMONYX |
| 元件分类： | PROM |
| 英文描述： | 4K X 8 FLASH 2.7V PROM, PDSO8 |
| 封装： | 0.169 INCH, ROHS COMPLIANT, TSSOP-8 |
| 文件页数： | 4/45页 |
| 文件大小： | 440K |
| 代理商： | M95320-WDW6TG |
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Operating features
M95320, M95640, M95320-x, M95640-x
4.1.4
Power-down
At Power-down (continuous decrease of VCC), as soon as VCC drops from the normal
operating voltage to below the Power On Reset threshold voltage, the device stops
responding to any instruction sent to it.
During Power-down, the device must be deselected and in Standby Power mode (that is
there should be no internal Write cycle in progress). Chip Select (S) should be allowed to
follow the voltage applied on VCC.
4.2
Active Power and Standby Power modes
When Chip Select (S) is Low, the device is selected, and in the Active Power mode. The
When Chip Select (S) is High, the device is deselected. If an Erase/Write cycle is not
currently in progress, the device then goes in to the Standby Power mode, and the device
consumption drops to ICC1.
4.2.1
Hold condition
The Hold (HOLD) signal is used to pause any serial communications with the device without
resetting the clocking sequence.
During the Hold condition, the Serial Data Output (Q) is high impedance, and Serial Data
Input (D) and Serial Clock (C) are Don’t Care.
To enter the Hold condition, the device must be selected, with Chip Select (S) Low.
Normally, the device is kept selected, for the whole duration of the Hold condition.
Deselecting the device while it is in the Hold condition, has the effect of resetting the state of
the device, and this mechanism can be used if it is required to reset any processes that had
been in progress.
The Hold condition starts when the Hold (HOLD) signal is driven Low at the same time as
Serial Clock (C) already being Low (as shown in Figure 5).
The Hold condition ends when the Hold (HOLD) signal is driven High at the same time as
Serial Clock (C) already being Low.
Figure 5 also shows what happens if the rising and falling edges are not timed to coincide
with Serial Clock (C) being Low.
Figure 5.
Hold condition activation
AI02029D
HOLD
C
Hold
Condition
Hold
Condition
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相关代理商/技术参数 |
参数描述 |
|---|---|
| M95320-WDW6TG/P | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:32 Kbit serial SPI bus EEPROMs with high-speed clock |
| M95320-WDW6TG/PC | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:32 Kbit serial SPI bus EEPROMs with high-speed clock |
| M95320WDW6TP | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:32 Kbit and 64 Kbit serial SPI bus EEPROMs with high-speed clock |
| M95320-WDW6TP | 功能描述:电可擦除可编程只读存储器 2.5 V to 5.5V 32k RoHS:否 制造商:Atmel 存储容量:2 Kbit 组织:256 B x 8 数据保留:100 yr 最大时钟频率:1000 KHz 最大工作电流:6 uA 工作电源电压:1.7 V to 5.5 V 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:SOIC-8 |
| M95320-WDW6TP/P | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:32 Kbit serial SPI bus EEPROMs with high-speed clock |
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