参数资料
型号: MA838
厂商: Zarlink Semiconductor Inc.
英文描述: SINGLE PHASE PULSE WIDTH MODULATION WAVEFORM GENERATOR
中文描述: 单相脉宽调制波形发生器
文件页数: 8/13页
文件大小: 314K
代理商: MA838
7
MA838
The pulse deletion time,
t
, is a function of the carrier wave
frequency and
pdt
, defined by the 7-bit pulse deletion time word
(PDT). The value of
pdt
is selected as shown in Table 7.
The pulse deletion time,
t
pd
, is then given by:
where
pdt
= 1-128 (as set by PDT) and
f
CARR
= carrier frequency.
Fig. 10 shows the effect of pulse deletion on a pure PWM
waveform.
Counter reset
When the CR bit is active (i.e., Iow) the internal power
frequency phase counter is set to 0 degrees. The power
frequency is then set to 0Hz and cannot be changed via the
normal frequency control.
Control Register Function
This 24-bit register contains the parameters that would
normally be modified during PWM cycles in order to control
the operation of the motor.
The parameters set in the control register are as follows:
Power frequency
Allows the power frequency of the PWM outputs to be
adjusted within the range specified in the initialisation register
Power frequency amplitude
By altering the widths of the PWM output pulses while
maintaining their relative widths, the amplitude of the power
waveform is effectively altered whilst maintaining the same
power frequency.
Overmodulation
Allows the output waveform amplitude to be doubled so
that a quasi-squarewave is produced. A combination of
overmodulation and a lower power frequency can be used to
achieve rapid braking in AC motors.
Output inhibit
Allows the outputs to be set to the low state while the PWM
generation continues internally. Useful for temporarily
inhibiting the outputs without having to to change other
register contents.
Fig. 10 The effect of the pulse deletion circuit
Fig 8 shows the eftect of the pulse delay circuit.
It should be noted that as the pulse delay circuit follows the
pulse deletion circuit (see Fig. 2), the minimum pulse width
seen at the PWM outputs will be shorter than the pulse deletion
time set in the initialisation register. The actual shortest pulse
generated is given by
t
pd
-
t
pdy
.
Pulse deletion time
To eliminate short pulses the true PWM pulse train is
passed through a pulse deletion circuit. The pulse deletion
circuit compares pulse widths with the pulse deletion time set
in the initialisation register. lf a pulse (either +ve or -ve) is
greater than or equal in duration to the pulse deletion time, it is
passed through unaltered, otherwise the pulse is deleted.
Fig. 8 Effect of pulse delay on PWM pulse train
Fig. 9 Temporary register R0
PDT word
Value of pdt
0000000
128
...etc...
...etc...
1111110
2
Table 7 Values of pdt
1111111
1
t
pd
=
pdt
f
CARR
x 512
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