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参数资料
| 型号： | MAS3507D |
| 厂商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分类： | 通用总线功能 |
| 英文描述： | MPEG 1/2 Layer 2/3 Audio Decoder |
| 中文描述： | 的MPEG 1 / 2 2 / 3层音频解码器 |
| 文件页数： | 43/60页 |
| 文件大小： | 867K |
| 代理商： | MAS3507D |
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PRELIMINARY DATA SHEET
MAS 3507D
Micronas
43
4.2.1. Pin Descriptions
4.2.1.1. Power Supply Pins
Connection of all power supply pins is mandatory for
the function of the MAS 3507D.
VDD
VSS
SUPPLY
SUPPLY
The VDD/VSS pair is internally connected with all digi-
tal modules of the MAS 3507D.
XVDD
XVSS
SUPPLY
SUPPLY
The XVDD/XVSS pins are internally connected with
the pin output buffers.
AVDD
AVSS
SUPPLY
SUPPLY
The AVDD/AVSS pair is connected internally with the
analog blocks of the MAS 3507D, i.e. clock synthesizer
and supply voltage supervision circuits.
4.2.1.2. DC/DC Converter Pins
DCEN
IN
The DCEN input signal enables the DC/DC converter
operation.
DCSG
SUPPLY
The DC converter Signal Ground pin is used as a
basepoint for the internal switching transistor of the
DC/DC converter. It must always be connected to
ground.
DCSO
OUT
DCSO is an open drain output and should be con-
nected with external circuitry (inductor/diode) to start
the DC/DC converter. When the DC/DC converter is
not used, it has to be connected to VSS.
VSENS
IN
The VSENS pin is the input for the DC/DC converter
feedback loop. It must be connected directly with the
Schottky diode and the capacitor as shown in
Fig. 2–3.
When the DC/DC converter is not used, it has to be
connected to VDD.
4.2.1.3. Control Lines
I2CC
I2CD
SCL
SDA
IN/OUT
IN/OUT
Standard I
2
C control lines. Normally there are Pullup-
resistors tied from each line to VDD.
4.2.1.4. Parallel Interface Lines
4.2.1.4.1. PIO Handshake Lines
PIO handshake lines are not used during start-up but
in operation mode. Read out of the status information
and the demand mode work in
μ
P-mode: set PCS = ’0’
and PR = ’1’. Usage of PIO-DMA mode is possible
with input mode via PIO.
PCS
IN
The PIO chip select must be set to ‘0’ to activate the
PIO as Output in operation mode (e.g. PI19 = demand
signal in mutimedia mode & SDI input mode).
PR
IN
The PIO PR
must be set to ‘1’ to validate data output
from MAS 3507D.
RTW
OUT
RTW is not supported by the built-in firmware.
RTR
OUT
RTR is only supported by the built-in firmware in PIO-
DMA input mode.
EOD
OUT
End of DMA (EOD) is only supported by the built-in
firmware in PIO-DMA input mode.
4.2.1.4.2. PIO Data Lines
The function of the parallel interface is separated into
two parts. During start-up, the PIO will read the start-
up configuration (independent from the PIO hand-
shake lines). This is done to define the environment for
the MAS 3507D (see Section 2.8.1. for details).
After start-up, the PIO will be switched to
μ
P-mode.
With the PR = ‘1’ and the PCS = ‘0’, the PIO interface
is defined as output and displays some status informa-
tion of the MPEG decoder. The PIO can be connected
to an external controller or to a display unit (e.g. LED).
The internal MPEG decoder firmware attaches specific
functions to the following pins:
相关PDF资料 |
PDF描述 |
|---|---|
| MAS3559F | MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS35x9F | MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS3509F | MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS3519F | MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS3529F | MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAS3509F | 制造商:MICRONAS 制造商全称:MICRONAS 功能描述:MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS3519F | 制造商:MICRONAS 制造商全称:MICRONAS 功能描述:MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS3529F | 制造商:MICRONAS 制造商全称:MICRONAS 功能描述:MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS3539F | 制造商:MICRONAS 制造商全称:MICRONAS 功能描述:MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS3549F | 制造商:MICRONAS 制造商全称:MICRONAS 功能描述:MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
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