参数资料
型号: MAS3507D
厂商: MICRONAS SEMICONDUCTOR HOLDING AG
元件分类: 通用总线功能
英文描述: MPEG 1/2 Layer 2/3 Audio Decoder
中文描述: 的MPEG 1 / 2 2 / 3层音频解码器
文件页数: 9/60页
文件大小: 867K
代理商: MAS3507D
PRELIMINARY DATA SHEET
MAS 3507D
Micronas
9
2.5. Clock Management
The MAS 3507D should be driven by a single clock at
a frequency of 14.725 MHz. It is possible to drive the
MAS 3507D with other reference clocks (see Section
3.7.2.1. on page 36).
The CLKI signal acts as a reference for the embedded
clock synthesizer that generates the internal system
clock. Based on the reference input clock CLKI, a syn-
chronized output clock CLKO that depends on the
audio sample frequency of the decompressed bit
stream is generated and provided as ‘master clock’ to
external D/A converters. Some of them need master
clocks that have a fixed relation to the sampling fre-
quencies. A scaler can be switched on during start-up,
optionally, by
setting
the PI8 pin
to 0
. Then, the clock-out
will automatically be divided by 1, 2, or 4 as defined in
Table 2–2.
2.6. Power Supply Concept
The MAS 3507D offers an embedded controlled DC/
DC converter for battery based power supply con-
cepts. It works as an up-converter.
2.6.1. Internal Voltage Monitor
An internal voltage monitor compares the input voltage
at the VSENS
pin with an internal reference value that
is adjustable via I
2
C bus. The PUP output pin becomes
inactive when the voltage at the VSENS pin drops
below the programmed value of the reference voltage.
It is important that the WSEN must not be activated
before the PUP is generated. The PUP signal thresh-
olds are listed in Table 3–8. The internal voltage moni-
tor will be activated with a high level at Pin DCEN.
2.6.2. DC/DC Converter
The DC/DC converter of the MAS 3507D is used to
generate a fixed power supply voltage even if the chip
set is powered by battery cells in portable applications.
The DC/DC converter is designed for the application of
1 or 2 batteries or NiCd cells as shown in Fig. 2–3
which shows the standard application circuit. The DC/
DC converter is switched on by activating the DCEN
pin. Its output power is sufficient for other ICs as well.
Note
: Connecting DCEN directly to VDD leads to
unexpected states of the DCCF register.
The PUP signal should be read out by the system con-
troller.
A 22
μ
H inductor is required for the application. The
important specification item is the inductor saturation
current rating, which should be greater than 2.5 times
the DC load current. The DC resistance of the inductor
is important for efficiency. The primary criterion for
selecting the output filter capacitor is low equivalent
series resistance (ESR), as the product of the inductor
current variation and the ESR determines the high-fre-
quency amplitude seen on the output voltage. The
Schottky diode should have a low voltage drop V
D
for a
high overall efficiency of the DC/DC converter. The
current rating of the diode should also be greater than
2.5 times the DC output current. The VSENS pin has
to be always connected to the output voltage.
2.6.3. Stand-by Functions
The digital part of the MAS 3507D and the DC/DC
converter are turned on by setting WSEN. If only the
DC/DC converter should work, it can remain active by
setting DCEN alone to supply other parts of the appli-
cation even if the audio decoding part of the
MAS 3507D is not being used. The WSEN power-up
pin of the digital part may be handled by the controller.
Please pay attention to the fact, that I
2
C protocol is
working only if the processor and its interfaces works
(WSEN = 1)
Table 2–2:
CLKO Frequencies
f
s
/kHz
CLKO/MHz
scaler on
CLKO/MHz
scaler off
48, 32
24.576
24.576
44.1
22.5792
22.5792
24, 16
12.288
24.576
22.05
11.2896
22.5792
12, 8
6.144
24.576
11.025
5.6448
22.5792
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