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参数资料
| 型号： | MAS3549F |
| 厂商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 元件分类： | Codec |
| 英文描述： | MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| 中文描述： | 新加坡金融管理局35x9F的MPEG 2 / 3层，AAC音频解码器，G.729的附件A编解码器 |
| 文件页数： | 27/92页 |
| 文件大小： | 1186K |
| 代理商： | MAS3549F |
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DATA SHEET
MAS 35x9F
Micronas
June 30, 2004; 6251-505-1DS
27
3.3. DSP Core
3.3.1. Access Protocol
The I
2
C data register is used to communicate with the
internal firmware of the MAS 35x9F. It is readable
(subaddress “data_read”) and writable (subaddress
“data_write”) and also has a length of 16 bits. The data
transfer is done with the most significant bit (m) first.
A special command language is used that allows the
controller to access the DSP registers and RAM cells
and thus monitor internal states, set the parameters for
the DSP firmware, control the hardware, and even pro-
vide a download of alternative software modules. The
DSP commands consist of a “Code” which is sent to
the I
2
C data register together with additional parame-
ters.
Fig. 3–2:
General core access protocol
Table 3–5 gives an overview over the different com-
mands which the DSP Core receives via the I
2
C data
register. The “Code” is always the first data nibble
transmitted after the “data_write” subaddress byte. A
second auxiliary code nibble is used for the short
memory (16-bit) access commands.
The MAS 35x9F firmware scans the I
2
C interface peri-
odically and checks for pending or new commands.
The commands are then executed by the DSP during
its normal operation without any loss or interruption of
the incoming data or outgoing audio data stream.
However, due to some time critical firmware parts, a
certain latency time for the response has to be
expected at the locations marked with a “W” (= wait).
The theoretical worst case response time does not
exceed 4 ms. However, the typical response time is
less than 0.5 ms.
Due to the 16-bit width of the I
2
C data register, all
actions transmit telegrams with multiples of 16 data
bits.
Table 3–4:
Data register bit assignment
15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00
m
l
...
S
DW
data_write
Code
,...
...,...
W
A
A
A
A
Table 3–5:
Basic controller command codes
Code
(hex)
Command
Function
0...3
Run
Start execution of an internal program.
Run
with start address 0 means
freeze the operating system.
5
Read Ancillary Data
The controller reads a block of MPEG Ancillary Data from the MAS 35x9F
6
Fast Program Download
The controller downloads custom software via the PIO interface
7
Read IC Version
The controller reads the version information of the IC
a
Read from Register
The controller reads an internal register of the MAS 35x9F
b
Write to Register
The controller writes an internal register of the MAS 35x9F
c
Read D0 Memory
The controller reads a block of the DSP memory
d
Read D1 Memory
The controller reads a block of the DSP memory
e
Write D0 Memory
The controller writes a block of the DSP memory
f
Write D1 Memory
The controller writes a block of the DSP memory
相关PDF资料 |
PDF描述 |
|---|---|
| MAS3587F | MPEG Layer 3 Audio Encoder/Decoder |
| MAS7848L | RDS MODEM / MANCHESTER DECODER |
| MAS7848L44C | RDS MODEM / MANCHESTER DECODER |
| MAS9090BS-T | LOW VOLTAGE 14-BIT LINEAR CODEC |
| MAS9090B | LOW VOLTAGE 14-BIT LINEAR CODEC |
相关代理商/技术参数 |
参数描述 |
|---|---|
| MAS3559F | 制造商:MICRONAS 制造商全称:MICRONAS 功能描述:MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS3587F | 制造商:未知厂家 制造商全称:未知厂家 功能描述:MPEG Layer 3 Audio Encoder/Decoder |
| MAS35X9F | 制造商:MICRONAS 制造商全称:MICRONAS 功能描述:MAS 35x9F MPEG Layer 2/3, AAC Audio Decoder, G.729 Annex A Codec |
| MAS36 | 制造商:CUI 制造商全称:CUI INC 功能描述:Incremental Encoder |
| MAS36-256-N5 | 功能描述:ENCODER OPT 46MM ABS BIN 256PPR RoHS:是 类别:传感器，转换器 >> 编码器 系列:MAS36 产品目录绘图:OPE Series Panel Mount 标准包装:1 系列:OPE 编码器类型:光学 输出类型:正交（增量） 每转脉冲:256 电源电压:5VDC 触动器类型:1/4 英寸直径扁平端头 锁销:无 内置开关:无 安装类型:面板安装 方向:垂直 端接类型:端子引脚 回转寿命（最小循环):- 产品目录页面:2569 (CN2011-ZH PDF) 相关产品:OPEDAS0256-ND - ENCODER 256PPR DISK ASSY SHAFT 其它名称:365-1542 |
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